Overlay (semiconductor technology)

Overlay offset (overlay offset) of two line structures. The uneven gaps that arise from the overlay offset and can have a decisive influence on the quality of the product can be clearly seen.

In the field of semiconductor technology, the English term overlay describes the overlap accuracy of structures from different manufacturing steps, usually two photolithographic levels. It is an important parameter in the manufacture of integrated circuits (ICs), such as computer processors and microcontrollers , because alignment errors of any kind can cause manufacturing errors , such as short circuits or missing connections, and thus limit the functionality of the circuit.

In addition to the overlay offset, there is another error that can occur during production and is also referred to in German as overlap or positioning accuracy , the registration . It describes the positioning accuracy of the structures compared to an absolute coordinate network.

background

Integrated circuits are manufactured through a sequence of photolithographic structuring and subsequent processing such as etching and implantation on a substrate, the wafer . In order for the finished circuit to function correctly, it is necessary that the individual photolithographic masks are coordinated with one another as much as possible and that the manufactured structures, e.g. contacts, lines and the components of the transistors , come as close as possible to the ideal of the planned circuit layout.

Measurement and measuring devices

General

The coverage accuracy is typically measured using special structures that have been optimized for this task. In principle, however, the actual structures required later for the function could also be used. The special structures are usually two structures of a similar shape but different sizes, which are ideally arranged centrally to one another, for example a box-in-box structure - these are mostly square, superimposed, planar structures in the Z direction are often separated by a third level. The measurement is made by measuring the distance between the respective structure edges. The overlay values for the x and y axes at the measured position on the wafer result from the mean value of the “left” and “right” or the “upper” and “lower” distance.

The measurement is usually carried out using optical measuring devices and medium to long-wave light - high-energy short-wave light would have effects similar to the UV light used for exposure and thus negatively affect the photoresist mask. Manufacturers of measuring devices for mass production include KLA-Tencor (ARCHER series) and Nanometrics (CALIPER series).

Test structures / overlay marks

Examples of overlay test structures: a) Box-in-Box b) Bar-in-Bar c) AIM (KLA-Tencor) d) Blossom (IBM). The different colors (red and blue) of the structures each indicate different photolithographic levels.

The overlay test structures are relatively large with sides of approx. 15 µm (in the exposure field they can also have a side length of only 5 µm). Box-in-box marks with large-area structures have therefore hardly been used since the use of chemical-mechanical planarization to level the wafer surface after layer deposition. Because here so-called dishing - excessive material removal in large structures - can occur and thus negatively influence the local planarization result. This can lead to problems in subsequent production steps such as the production of the second level of the overlay structure. For this reason, new test structures have been introduced that are smaller and more similar to the actual structures on the wafer. These include linear structures such as frame-in-frame (Engl. Frame , dt., Frame ') and bar-in-bar (Engl. Bar , dt., Strip' or 'bar') and combinations thereof, such as box-in frame . Other test structures customary in the industry are grid structures such as “AIM” ( advance imaging metrology ) and “µAIM” from KLA-Tencor as well as trench structures such as “Blossom” and “µBlossom” from IBM / Nanometrics.

In addition to these actual overlay marks, there have been test structures for some years that are based on the scattering of light on trench structures ( diffraction-based overlay ). Scatterometry techniques are used, which are already widely used in semiconductor technology, for example for process control in the manufacture of trenches. These include "SCOL" brands ( scatterometry overlay ) from KLA Tencor. The new overlay measurement technology should work more stably and deliver more accurate measured values. The disadvantage is the higher space requirement, which hinders the use, especially against the background of increasing measurements in the exposure field, where precious area is reluctantly released for test structures.

Influencing variables

In addition to the actual overlay offset, additional influences from the wafer and the measuring system occur in practice. They can be divided into symmetrical and asymmetrical sizes. Symmetrical influences such as changes to the structure sizes, commonly referred to as critical dimension (Engl. Critical dimension , CD) referred to. This is primarily associated with variations in width. The symmetrical design of the targets and the averaging of the “left” and “right” shifts mean that these influences can be eliminated. On the other hand, asymmetrical influences are different; they can only be reduced, if at all, by additional measurements. Asymmetrical influences can be divided into shifts caused by the measuring device and the wafer and are also referred to in German with the English abbreviations TIS ( tool-induced shift ) and WIS ( wafer-induced shift ). The interactions between these influences are complex.

Tool-induced shift (TIS)

When TIS (engl. Tool-induced shift , dt. Plant-induced shift ) If it is a (engl. From the meter tool ) caused shifts between the two partial values from the overlay determination and results in a distorted reading. The cause of the occurrence of the TIS are the tolerances that always occur in reality when setting up the optical system. For example, they mean that the "viewing direction" of the measuring device is not exactly perpendicular to the wafer to be measured. This leads to a shift in the two partial values (one partial value becomes slightly larger and the other correspondingly smaller). Since this influence can be regarded as approximately stable, it is usually viewed as a systematic error in the measurement. The TIS for a structure can be determined relatively easily by measuring the same structure again rotated by 180 °. In an ideal measurement system, the overlay value measured at 180 ° would correspond exactly to the amount of the measurement at 0 °, but would have opposite signs . In a real measuring system, as mentioned, the TIS is added. It can be determined by adding the overlay values from both measurements:

{\ displaystyle TIS = {\ text {Overlay}} (0 ^ {\ circ}) + {\ text {Overlay}} (180 ^ {\ circ})}

If one neglects further influences from the wafer or the wafer holder, one can simply assume that the TIS applies to all measurements and so the measured values can be corrected at a few measuring marks by subtraction after the TIS has been determined. With increasing accuracy requirements for the measurement, further parameters, such as the wafer geometry, gain in importance, as they also have an influence on the TIS. The correction of these influences therefore makes it increasingly necessary to determine the TIS at significantly more or even at all measuring points.

In addition to the physical influences from the measuring device, the image evaluation of the overlay measuring device also has a (greater) influence on the TIS. Low-contrast camera images of one or both test structures (measurement and reference plane) as well as a poor / unsuitable edge detection algorithm can additionally increase the TIS. Overlay systems are therefore usually equipped with different color filters. They allow the contrast of the recorded grayscale image to be varied for the test structures and thus the image evaluation or the TIS to be optimized before the corresponding measurement recipe.

Wafer-induced shift (WIS)

As already mentioned, there are different overlay test structures, all of which stem from asymmetrical influences of the test structures on the manufacturing processes, for example asymmetrical layer deposition. The less systematic measurement errors caused by this are referred to as wafer-induced shift (English, WIS, dt. "Wafer-induced shift") and can account for a significant part of the total measurement error. In contrast to TIS, the WIS influences cannot be determined simply by multiple measurements of the same structure at different angles of rotation. In general, they are very difficult to identify or determine. Often they can only be determined after the subsequent processes, for example after the etching of a layer masked by the photoresist mask.

presentation

Example of an overlay vector map in which only 9 exposure fields were measured. The case shown is a wafer misalignment of 10 ° and an uncorrectable random error.

The overlay offset is often shown in the form of a vector map of the wafer. The vectors for the x and y offset are plotted on this map at the position of the measuring points. In this way, simple overlay errors such as translation or rotation as well as outliers in the measured values can be easily identified.

Analysis and modeling

In the production of semiconductor products, numerous measurement data determined after a process step flow into the correction of process parameters of subsequent workpieces (wafers), cf. statistical process control (SPC) and advanced methods of process control (APC). These parameters also include overlay information that was determined during production or in special experiments. Using various complex correction models, these data flow directly into the production process through the software of the exposure systems, for example in the form of changes in the wafer position or the wafer alignment.

The modeling of the overlay offset and the determination of correction data can generally be divided into errors that are caused by the reticle and those caused by the wafer or the wafer table. The forms of these two groups of overlay defects are in turn dependent on the photolithography system used, that is, whether a system that works on the whole wafer, scanner, step-and-repeat or step-scan principle is used.

In addition to these basic overlay errors, there are two other large groups of error causes. On the one hand, these are errors that arise through the use of multiple exposure systems (so-called matching errors) and, on the other hand, process-dependent effects. Matching errors are differences between different exposure systems (coordination errors). These are non-random errors that arise, for example, from differences in the precision of the positioning systems or from non-planarities of the interferometer mirrors used. Process-dependent effects are in turn influences that arise from changes in the alignment signal of the alignment marks. They are caused by the interaction of all process parameters involved in production, such as B. Etching depth, layer deposition or polishing processes. They affect the shape of the alignment marks. For example, they can lead to asymmetrical alignment marks that show up as an offset when measured, but that actually does not exist.

Basic model

Examples of overlay offsets that are typically modeled

The simplest case of a photolithography system is the “whole wafer” principle, in which the wafer is completely exposed with the mask in one step; This original principle is generally used for wafer sizes with a diameter of up to 100 mm. If one only considers the positioning of the reticle and the wafer with respect to one another, the following forms of overlay errors can occur: 1. relative displacement in the x or y direction, 2. rotation, and 3. trapezoidal distortion due to tilting. The reasons for this lie in positioning and alignment errors of the reticle or the wafer. In projection systems in which the structures on the mask are larger than the structures shown, a magnification error can also occur, which is caused by different focus settings.

Mathematically, these influences can be captured by a simple linear model:

{\ displaystyle \ Delta X = T_ {x} + S_ {x} X-R_ {x} Y + e_ {x}}

and

{\ displaystyle \ Delta Y = T_ {y} + S_ {y} Y-R_ {y} X + e_ {y}}

Where and is the overlay offset in the x or y direction, which is composed of an absolute offset and , the scaling error or , the rotation component or and the non-correctable residual errors and . ${\ displaystyle \ Delta X}$ ${\ displaystyle \ Delta Y}$ ${\ displaystyle T_ {x}}$ ${\ displaystyle T_ {y}}$ ${\ displaystyle S_ {x} X}$ ${\ displaystyle S_ {y} Y}$ ${\ displaystyle R_ {x} Y}$ ${\ displaystyle R_ {y} X}$ ${\ displaystyle e_ {x}}$ ${\ displaystyle e_ {y}}$

Special features of scanner and stepper systems

With scanner systems , the wafer is also exposed in one step. However, the entire wafer is not exposed simultaneously, rather the exposure only takes place in a strip-shaped area that is guided over the wafer. For this purpose, the reticle and the wafer are moved in opposite directions in one axis. This additional movement can in turn cause two main forms of overlay error: an asymmetrical enlargement in the direction of the movement axis, which is caused by different movement speeds of guide systems, and skew , which is caused by parallelism errors between the two guide systems.

Effects of a relative rotation of the reticle and wafer by 5 °
Caused by a rotation of the reticle
Caused by a rotation of the wafer

The problem with these two types of systems is that the measurement data alone cannot determine whether the error was caused by the reticle or the wafer. Because only the overlay offset of the two is determined relative to one another. It looks different with stepper systems (step-and-repeat principle). Here the exposure takes place in which the reticle is imaged several times in succession in a grid on the wafer. This difference shows the alignment errors of the reticle and wafer in different ways. For example, a rotational shift of the wafer is strongly dependent on the position of the exposure field on the wafer, that is, the amount of the overlay error is in the edge areas of the wafer largest and theoretically zero in the middle (see figure). In addition to positioning and alignment errors of the reticle or the wafer, steppers also have other causes of errors that are caused by the wafer holder ( chuck ) used. Among other things, non-linearities in one axis and non-orthogonality of the axes to one another should be mentioned here. They show up in turn in translation and rotation errors. These are particularly relevant when using several systems. It does not matter whether the system types are identical or different, because the positioning errors of the wafer table are individual and can also have changed during maintenance work. The step-scan principle, which is mainly used in industrial production today (2012), is a hybrid of scanner and stepper, see stepper (semiconductor technology) . This is where all of the aforementioned overlay errors occur.

Other influences

In addition to these relatively simple causes for overlay offsets, other sources of error also play a role in modern systems (almost always the step-scan principle). These include, for example, unevenness in the wafer table or lens distortion. These are usually higher order overlay errors with relatively small amounts. However, they can be decisive for the quality of products with structure sizes of less than 45 nm, since they make up the decisive part of the remaining overlay errors after the correction of the error causes mentioned and are in the critical areas (gate structuring and the first conductor track levels ) to make noticable. Because of the higher order more measurement data for modeling are clearly necessary, in addition, not only from the more scribe ( scribe line must come), but also from the area of the actual circuit. Due to the high level of measurement effort and the fact that the values usually only change when the systems are converted, the data are not determined during ongoing production. Another disadvantage when determining the higher-grade errors is that the overlay structures are very large compared to the active structures, which represents a very high and therefore cost-intensive space requirement.

Other influences that are problematic in the manufacture of modern circuits are minimal changes in length due to temperature differences between parts of the exposure system or the wafer. However, these are difficult to correct using overlay models, since the operating status plays an important role here. These influences are therefore minimized through appropriate warm-up times and defined process temperatures.

meaning

Overlay control has gained significantly in importance in recent years and is as critical as the control of CD values . The reasons for this are the increasing due to the typical industrial scale of the structures structural density and the increasing use of complex manufacturing techniques, such as double patterning (engl. Double patterning ) connected to the 45-nm and subsequent technology nodes have been introduced in the production process.

literature

Chris A. Mack: Principles of optical lithography . Wiley, 2007, ISBN 978-0-470-01893-4 , pp. 314-326 .
Harry J. Levinson: Principles of Lithography . 3. Edition. SPIE Press, 2011, ISBN 978-0-8194-8324-9 (Chapter 6: Overlay).

Web links

M. David Levenson: KLA Tencor announces Archer 200 overlay metrology system. Electroiq, accessed December 6, 2011 (example image for an overlay error).
Chin-Chou Kevin Huang, David Tien: Overlay control goes to high-order. electroiq, accessed December 6, 2011 (Examples with overlay vector maps of wafers showing registration and wafer-related errors.).

Individual evidence

↑ CP excerpt including: Blossom overlay metrology implementation . tape 6518 . SPIE, 2007, p. 65180G , doi : 10.1117 / 12.712669 .
↑ Prosenjit Rai-Choudhury (Ed.): Handbook of microlithography, micromachining, and microfabrication . Institution of Engineering and Technology, London 1997, ISBN 0-85296-906-6 , pp. 500-501 .

[1] CP excerpt including: Blossom overlay metrology implementation . tape 6518 . SPIE, 2007, p. 65180G , doi : 10.1117 / 12.712669 .

[2] Prosenjit Rai-Choudhury (Ed.): Handbook of microlithography, micromachining, and microfabrication . Institution of Engineering and Technology, London 1997, ISBN 0-85296-906-6 , pp. 500-501 .