Sample-and-hold circuit

A sample-and-hold circuit ( S&H for short ), also referred to in German as a sample-and-hold element or sample- and -hold circuit or instantaneous value sampling , is an electronic device that allows analog voltage values ​​to be briefly set to a defined value Worth keeping. Such a circuit has a control input, a signal input and a signal output. The control input is between sample and hold phase switch; this determines whether the output signal follows the input signal (sampling phase) or is held (hold phase). Important parameters are response time, maximum rate of rise and holding drift .

Applications

Signal curve of a sample-and-hold circuit of the 0th order, shown in red; in gray the analog input signal. Although the sampling phases (dashed lines) are hardly representable here, they are long enough to ensure that the output voltage follows.

When switched on, the output voltage of the sample-and-hold circuit follows the input voltage. When switched off, the zero order sample-and-hold circuit holds the value that the input voltage had at the moment it was switched off, as shown in the adjacent figure. Sample-and-hold circuits with a higher order can also supply values ​​other than an instantaneous value. For example, a first-order sample-and-hold circuit supplies the arithmetic mean value of the analog input voltage in the measuring interval.

The circuit is mostly used in front of an analog-digital converter , which performs the quantization , but also for synchronous demodulation of signals. The sample-and-hold circuit is usually integrated in practical analog-to-digital converters, which ensures a lower price, less space requirement and a common specification of both components.

The use of a sample-and-hold circuit allows correct conversion even with rapid changes in the input voltage, which without a sample-and-hold circuit would lead to incorrect conversion results. Only in the case of voltages changing very slowly - compared to the conversion time - can the sample-and-hold circuit be dispensed with.

If the sampling frequency is less than twice the frequency of the measurement voltage, it is called undersampling . The circuit then corresponds to a down mixer of high frequency technology.

In the synchronous demodulator you can measure extremely low AC voltage of known frequency if you only sample the input voltage with an S&H circuit when the voltage to be measured should have reached the maximum value. Interference voltages at other times are then ignored.

A special case is the use of sample and hold technology in liquid crystal displays (LCD). In active matrix displays , each picture element ( pixel ) corresponds to an electrical capacitance C1 which, for dynamic image display, is charged periodically with each sequential image control according to the desired gray tone . In order to be able to hold the voltage sufficiently well during the sampling pause, an additional electrical capacitance C2 is connected in parallel to each LC pixel using thin-film technology , so that a capacitance of C = C1 + C2 results. A thin-film field effect transistor is connected upstream of each capacitor C per pixel as switch S. This technology allows high resolution video images to be displayed and is therefore used in LCD televisions and computer monitors . Because of Abtastpausen it can during rapid screen changes to blur (Engl. Motion blur ) come.

In system theory , the mathematical transfer function of the sample-and-hold circuit (also called the zero order holding element or ZOH element (zero order hold)) can be used to discretize time-continuous transfer functions (see below for method).

Structure and mode of operation

Schematic arrangement of a sample-and-hold element

The central element of the sample and hold circuit is a capacitor . During the holding phase, it keeps the output voltage as constant as possible. There is also an electronic switch which determines the sample and hold phase.

If the switch is closed , the capacitor is charged via an impedance converter . The impedance converter prevents an excessive load on the voltage source and thus falsification of the measurement result. In order to be able to maintain the voltage at the output as long as possible, a voltage follower is connected downstream of the capacitor .

After closing the switch, the output voltage does not rise immediately to the value of the input voltage, but only with a limited slew rate ( slew rate ). This is determined by the maximum output current of the impedance converter and the size of the capacitor. When the voltage on the capacitor has reached the value of the input voltage, a transient process begins. The duration of the transient process is largely determined by the damping of the impedance converter and the resistance of the switch when it is closed. The time that is required until the output voltage to the value of the input voltage within the predetermined tolerance swings, as is setting time ( acquisition time hereinafter). ${\displaystyle \epsilon }$ ${\displaystyle t_{E}}$

${\displaystyle t_{E}=R_{\text{Schalter}}\cdot C\cdot {\begin{cases}4{,}6&{\text{mit}}\ \epsilon =0,01\\6{,}9&{\text{mit}}\ \epsilon =0{,}001\\\end{cases}}}$

If the switch is open , the capacitor or the voltage follower keeps the output voltage at the value that was present at the input before opening.

The time needed to switch to the hold state, Aperture-time ( Aperture Delay referred). The aperture time fluctuates due to variations in the behavior of the switch. The fluctuations are known as aperture jitter . ${\displaystyle t_{A}}$ ${\displaystyle \Delta t_{A}}$

behavior

Due to various interfering influences, the behavior of real sample-and-hold circuits deviates from the ideal behavior. Here is a short list of the effects to be observed.

• Droop or hold drift

The most important parameter on hold is the holding drift ( droop ). It is determined by the discharge current of the capacitor, which is made up of the reverse current of the switch, the input current of the impedance converter and the self-discharge current of the capacitor. ${\displaystyle I_{L}}$

${\displaystyle {\frac {\Delta U_{a}}{\Delta t}}={\frac {I_{L}}{C}}}$

While a small capacitor has a positive effect on the response time, a small capacitor has a negative effect in the case of discharge via the switch and the voltage follower at the output. In order to determine the ideal value of the capacitor, it is important to carefully weigh the advantages and disadvantages and to achieve a suitable compromise.

• Hold Step

When switching to the hold state, the output voltage does not necessarily remain at the current value of the input voltage. A voltage jump ( hold step ) with a subsequent settling process can occur. This is due to the fact that when switching, part of the capacitor charge drains through the capacitance of the switch. ${\displaystyle U_{a}}$ ${\displaystyle \Delta U_{a}}$

${\displaystyle \Delta U_{a}={\frac {C_{\text{Schalter}}}{C}}\Delta U_{\text{Schalter}}}$

• Feedthrough or penetration

Another problem is the penetration (feed through). This arises from the fact that the capacitance of the open switch and the storage capacitance form a capacitive voltage divider on which the voltage at the input acts.

• Parasitic effects of the capacitor

Since with capacitors the charge migrates from the electrodes into the dielectric over time, one has to imagine an RC element connected in parallel to the capacitor , consisting of a high-resistance R '(in the gigaohm range) and a C' <C. In the event of a voltage jump in size , there is a subsequent change in voltage : ${\displaystyle \Delta U}$ ${\displaystyle \Delta U'}$

${\displaystyle \Delta U'=\Delta U{\frac {C'}{C}}}$

How pronounced this effect is depends largely on the dielectric used. Polycarbonate ( PC ), polyethylene terephthalate ( PET ) and ceramic dielectrics have poor properties here. For this reason, capacitors with a dielectric made of polytetrafluoroethylene ( Teflon , PTFE ), polystyrene ( PS ) or polypropylene ( PP ) are used in discrete sample-and-hold circuits .

Zero order holding element (image area)

Both in the time-continuous (s) and in the time-discrete (z) image area there are corresponding modeling possibilities of a sample-and-hold element, which are composed of a step function and a dead time element. An important application of these models is the transition from a time-continuous (s-range) to a time-discrete transfer function (z-range).

Step responses from G1 (s) and G1 (z)

In the Laplace image area, the transfer function of the zero-order holding element is:

${\displaystyle H(s)={\frac {1}{s}}\cdot (1-e^{-s\cdot T_{0}})\,.}$

To make the transition to the time-discrete area, it is multiplied by a system function to be discretized . Then the z-transformation is carried out: ${\displaystyle H(s)}$ ${\displaystyle G(s)}$

${\displaystyle H(z)\cdot G(z)=Z\lbrace H(s)\cdot G(s)\rbrace =Z\left\{(1-e^{-s\cdot T_{0}})\cdot {\frac {G(s)}{s}}\right\}\,.}$

The expression corresponds to the time-continuous dead time element whose z-transform (delay by 1 sample) is. ${\displaystyle e^{-s\cdot T_{0}}}$ ${\displaystyle z^{-1}}$

Thus the expression to be transformed is simplified to:

${\displaystyle G_{h}(z)=(1-z^{-1})\cdot Z\left\{{\frac {G(s)}{s}}\right\}\,.}$

${\displaystyle G_{h}(z)}$is the time-discrete variant (h for "hold") of . The resulting function can now be brought into the general form of an LTI System z transfer function (by comparison of coefficients), whereby a recursive system structure is achieved during the discretization, i.e. an IIR system : ${\displaystyle G(s)}$

${\displaystyle G_{h}(z)={\frac {b_{0}+b_{1}\cdot z^{-1}+b_{2}\cdot z^{-2}+\dots +b_{M}\cdot z^{-M}}{a_{0}+a_{1}\cdot z^{-1}+a_{2}\cdot z^{-2}+\dots +a_{N}\cdot z^{-N}}}\,.}$

The effort involved in the derivation is very intensive in higher-order systems, but program packages in the area of ​​signal processing (MATLAB / Octave) offer commands for conversion. Implementations for the entire procedure already exist. As an example the transfer function (2nd order)

${\displaystyle G_{1}(s)={\frac {2s}{s^{2}+0{,}2s+1}}}$

be discretized using the mathematical ZOH member model with software for this purpose (MATLAB / Octave). To do this, you must specify the required sampling time , which is set here : ${\displaystyle T_{0}}$ ${\displaystyle T_{0}=1s}$

transferfunktion = tf([2 0], [1 0.2 1]);
c2d(transferfunktion, 1, 'zoh')

The resulting discrete-time transfer function is:

${\displaystyle G_{1}(z)={\frac {Y(z)}{X(z)}}={\frac {1{,}526z-1{,}526}{z^{2}-0{,}9854z+0{,}8187}}\,.}$

Where is the system output and the system input. The transfer function is not yet causal, as it would not access previous input values, but future input values. Therefore, the numerator and denominator are each divided by, resulting in the following transfer function: ${\displaystyle Y(z)}$ ${\displaystyle X(z)}$ ${\displaystyle z^{2}}$

${\displaystyle G_{1}(z)={\frac {Y(z)}{X(z)}}={\frac {1{,}526z^{-1}-1{,}526z^{-2}}{1-0{,}9854z^{-1}+0{,}8187z^{-2}}}\,.}$

A change leads to:

${\displaystyle Y(z)(1-0{,}9854z^{-1}+0{,}08187z^{-2})=X(z)(1{,}526z^{-1}-1{,}526z^{-2})\,.}$

Resolving the bracketed expressions:

${\displaystyle Y(z)-Y(z)\cdot 0{,}9854z^{-1}+Y(z)\cdot 0{,}08187z^{-2}=X(z)\cdot 1{,}526z^{-1}-X(z)\cdot 1{,}526z^{-2}\,.}$

Since a delay represents samples and the Z-transformation is linear, the transformation into the discrete time domain for the value of the current sample results: ${\displaystyle z^{-n}}$ ${\displaystyle n}$

${\displaystyle y[n]=1{,}526x[n-1]-1{,}526x[n-2]+0{,}985y[n-1]-0{,}08187y[n-2]\,.}$

This procedure has enabled the transition from an s-transfer function (which in turn is a differential equation) to a difference equation. This was made possible through the use of a mathematical model of a ZOH term. This process is used in digital control technology to create a transition between analog and digital control loop elements. An alternative method for this is the bilinear transformation .

In the drawing you can see the uniform jump responses of the two systems. It can be seen that the discrete system function holds the exact value of the continuous system function over the sample time . The exact value of the continuous system is maintained even with very long sampling times. ${\displaystyle T_{0}}$

building blocks

Type	Manufacturer	Capacitor capacity	Capacitor structure	Response time	resolution	Rising speed- speed	Holding drift	technology
LF398	various	10 nF	external	20 µs	10 bits	0.5 V / µs	3 mV / s	Bipolar FET
LF398	various	1 nF	external	4 µs	10 bits	5 V / µs	30 mV / s	Bipolar FET
AD585	Analog Devices	100 pF	internally	3 µs	12 bit	10 V / µs	0.1 V / s	Bipolar
SHC5320	Burr Brown	100 pF	internally	1.5 µs	12 bit	45 V / µs	0.1 V / s	Bipolar
SHM20	Date	100 pF	internally	1 µs	12 bit	45 V / µs	0.1 V / s	Bipolar
CS3112	Crystal		internally	1 µs	12 bit	4 V / µs	1 mV / s	CMOS
CS31412	Crystal		internally	1 µs	12 bit	4 V / µs	1 mV / s	CMOS
AD781	Analog Devices		internally	0.6 µs	12 bit	60 V / µs	10 mV / s	Bipolar MOS
AD782	Analog Devices		internally	0.6 s	12 bit	60 V / µs	10 mV / s	Bipolar MOS
AD684	Analog Devices		internally	0.6 s	12 bit	60 V / µs	10 mV / s	Bipolar MOS
HA5330	Harris	90 pF	internally	0.5 µs	12 bit	90 V / µs	10 mV / s	Bipolar
AD783	Analog Devices		internally	0.2 µs	12 bit	50 V / µs	20 mV / s	Bipolar MOS
LF6197	National Semiconductor	10 pF	internally	160 ns	12 bit	145 V / µs	0.6 V / s	Bipolar FET
HA5351	Harris		internally	50 µs	12 bit	130 V / µs	100 V / s	Bipolar
AD9100	Analog Devices	22 pF	internally	16 ns	12 bit	850 V / µs	1 kV / s	Bipolar
SHM12	Date	15 pF	internally	15 ns	12 bit	350 V / µs	0.5 kV / s	Bipolar
AD9101	Analog Devices		internally	7 ns	10 bits	1800 V / µs	5 kV / s	Bipolar
SHC702	Burr Brown		internally	0.5 µs	16 bit	150 V / µs	0.2 V / s	Hybrid
SP9760	Sipex		internally	0.35 µs	16 bit	160 V / µs	0.5 V / s	Hybrid
SHC803	Burr Brown		internally	0.25 µs	12 bit	160 V / µs	0.5 V / s	Hybrid
SHC49	Date		internally	0.16 µs	12 bit	300 V / µs	0.5 V / s	Hybrid
HS9730	Sipex		internally	0.12 µs	12 bit	200 V / µs	50 V / s	Hybrid
SHM43	Date		internally	35 ns	12 bit	250 V / µs	1 V / s	Hybrid
SHC601	Burr Brown		internally	12 ns	10 bits	350 V / µs	20 V / s	Hybrid
HTS0010	Analog Devices		internally	10 ns	8 bit	300 V / µs	50 V / s	Hybrid

1. ↑ ^{a b} Quadruple sample-and-hold element
2. ↑ Double sample-and-hold element

literature

• Hans-Jochen Schulze, Georg Engel: Modern music electronics. Practice-oriented electroacoustics and devices for electronic sound generation. Military publishing house of the GDR, Berlin 1989, ISBN 3-327-00772-1 ( amateur library ).
• Ulrich Tietze, Christoph Schenk, Eberhard Gamm: Semiconductor circuit technology. 12th edition. Springer, Berlin a. a. 2002, ISBN 3-540-42849-6 , pp. 977ff.
• Friedrich Wilhelm Garbrecht: Digital control technology . VDE Verlag, ISBN 978-3-8007-1695-1