Delta sigma modulation

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The delta-sigma - (ΔΣ) modulation is a form of analog-to-digital conversion or digital-to-analog conversion , which differs from the delta modulation is derived. Despite the development of the ΔΣ technology in the early 1960s, this technology has only been inexpensive to manufacture since the 1990s with the advances in CMOS technology. Delta-Sigma modulators are offered by many large semiconductor manufacturers as a finished integrated circuit .


Fig. 1: Basic block diagram of a first order ΔΣ modulator with digital output.
Figure 2: Block diagram of a second-order ΔΣ modulator, which offers a better signal-to-noise ratio than that from the first figure.

The principle of delta-sigma modulation is based on an initially rough measurement of the signal (quantizer, in the picture "quantizer"). The resulting measurement error is integrated ("integrator" in the picture) and gradually compensated for via negative feedback. Said steps are carried out very frequently, for example at 128 times the rate ( oversampling ) of the sampling rate of the PCM data that is usually used on the digital side.

The picture shows the situation for an analog-to-digital converter: The output signal of the feedback loop (1-bit signal) is processed by a digital filter which, through its structure, increases the word length and, through decimation (not shown in the picture), the sampling rate of the PCM data. The 1-bit signal, on the other hand, is converted into an analog signal at the input for the analog comparison (here the quantizer is a comparator ). (Where convert sounds a bit pretentious - it is indeed by the 1-bit DAC switched between only two voltages.) At the underlying principle will not change when an analog filter is used instead of the digital filter and digital at the input PCM signals by a digital comparison processed - although there is now a digital-to-analog converter. Accordingly, all four combinations of analog and digital input and output are conceivable. The combinations of analog and digital parts form the analog-digital and digital-analog converters already described. The combination of analog and analog - with digital storage of the 1-bit signal ( Direct Stream Digital ) on the data carrier - basically takes place in the SACD . A digital-digital conversion is conceivable for sample rate conversion if necessary .

Values ​​in different levels of the delta-sigma converter

The middle output signal represents the input signal. The delta-sigma modulation has the property that the spectral power density reduces the unwanted quantization noise at low frequencies and increases it at high frequencies (which are outside the frequency band to be recorded ) - to put it clearly, the noise power is shifted to higher frequencies; this fact is called " noise shaping " or engl. "Noise Shaping" called. This allows the low-frequency signal components to be recorded with a high signal-to-noise ratio .

Higher frequencies are not used due to the unfavorable signal-to-noise ratio and are removed by a filter (a digital filter for a digital output (ADC) or an analog filter for an analog output (DAC); in the picture, "digital filter"). As already indicated above, in the case of a digital output, this filter simultaneously decimates to the desired output bandwidth and expands the word length of the quantizer for a suitable dynamic range.

The number of integrators or the number of negative feedback loops characterize the order of the ΔΣ modulator. The higher the order, the stronger the shift of the noise and the higher frequencies that can be used. In the case of higher orders, the disadvantage is that vibrations and instabilities can in principle occur in the modulator circuit.

The ratio of the sampling rate conversion (Oversampling Ratio, OSR ) and the order N determine the possible dynamic range of a delta-sigma converter. The dynamic range, the ratio between the power of a sine tone that can be digitized without distortion and the noise power, results from:

The higher the oversampling and the greater the order, the greater the dynamic range of the converter.

The advantage over other AD conversion principles is the high sampling rate of the analog signal compared to the bandwidth of the useful signal. As a result of this oversampling , an analog band limitation filter , which is required to adhere to the Nyquist-Shannon sampling theorem , only needs a slight edge steepness and can be constructed in a correspondingly simple manner. See also the Order section in the Filter article . Due to the conversion principle with integrator, feedback and output filter, there is a comparatively long signal delay time (e.g. 25 times the sampling interval of the PCM data), which can sometimes - depending on the application - have a disadvantageous effect.


Due to its properties, it is advantageously used in a number of applications:

  • In the area of audio signal processing , it has almost completely displaced other converter technologies. Versions with a signal bandwidth of 100 kHz and a signal-to-noise ratio of 120 dB have been commercially available since 2005. In particular, the sigma-delta modulator forms the basis of the coding method known as Direct Stream Digital used in the Super Audio Compact Disc . In principle, a “distributed” analog-to-analog modulation is carried out, with the 1-bit signal coming from the quantizer (before the filter) being recorded on the SACD during recording. The data stream is only processed into the output signal by an analog filter during playback.
  • For low-frequency measurement data acquisition, special designs with bandwidths of less than 50  Hz are used in seismometers , electronic scales and similar devices. These converters usually also have a special digital filter that suppresses the mains frequencies of 50 Hz and 60 Hz and their harmonics.
  • In PLL circuits for fractional-rational clock generation (fractional-N-PLLs), sigma-delta modulators can be used in the feedback branch in order to switch between the divider ratios used alternately in fractional-N-PLLs (so-called MASH). The advantage of fractional-N PLLs is the lower phase noise and the higher maximum loop bandwidth for a constant output frequency, since a higher reference clock can be used than with conventional PLLs. However, the continuous switching of the division ratio means an additional source of noise. By controlling the switching of the division ratio using a sigma-delta modulator, however, the property of noise shaping can be used to shift the additional phase noise away from the output frequency of the fractional-N PLL, where it is filtered by the low-pass effect of the PLL can be.
  • Due to the signal delay time, delta-sigma modulation is not suitable for certain applications in the field of control technology .

See also


Web links

Individual evidence

  1. a b Data sheet CS4390 - 24-Bit, Stereo D / A Converter for Digital Audio (PDF), under “Delta-Sigma Modulator” (p. 7) and “Group Delay” (for analog characteristics, p. 2)
  2. Technical Brief SWRA029 - Fractional / Integer-N PLL Basics (PDF; 6.9 MB) Texas Instruments.