Intel I

from Wikipedia, the free encyclopedia

I / O Controller Hub (ICH) is the name of the microchip Intel 82801 and is used by Intel as a synonym for Southbridge .

Intel 82801 (ICH2)

backgrounds

The i82801 was developed by Intel in 1998 as a Southbridge for future chipsets after the very successful BX Northbridge 82443. Unlike its predecessor, the 82371 (PIIX), the 82801 is no longer connected via an internal PCI bus with 133 MB / s, but via a proprietary interface called Intel Hub Interface with 266 MB / s (bus width 8 bits) connected to its northbridge. The hub interface is a point-to-point connection between various components on the motherboard. The idea behind was to move away from the rigid north-south axis on the motherboard and towards a more star-shaped structure. Numerous other "hubs" were therefore developed in parallel to the ICH: The previous northbridge became the memory controller hub (MCH). If it also integrates a graphics core, it is called the Graphics and Memory Controller Hub (GMCH). For server use, the ICH could be supplemented with the 82806 chip via the hub interface, which provides additional PCI-64 ports. The classic BIOS flash module was upgraded with a hardware random number generator (based on thermal noise) and henceforth called Firmware Hub (FWH). With the new Northbridge 82820, Intel relied fully on the then modern and expensive Rambus DRAM . The 82803 Memory Repeater Hub (MRH), with which a Rambus channel can be split into two channels , was used to accommodate more main memory on the server motherboard . In response to pressure from the motherboard manufacturers, a Memory Translator Hub (MTH) and an MRH-S were developed in order to still be able to build motherboards for SDRAM . However, the chips never worked without problems and eventually had to be buried.

Product history

I

82801AA

The first version of the ICH (82801AA) has 241 pins and supports up to six PCI devices, ATA / 66 , two USB 1.1 ports and the then still new standards ACPI and APIC . For the first time, an AC97 -based 3-channel sound solution was integrated into the Southbridge. Since there was no longer a PCI connection between the north and south bridges, the PCI arbiter was relocated to the ICH. At that time, Intel and Microsoft were vigorously pursuing the legacy free initiative, which sought to replace outdated interfaces such as the ISA bus and RS-232 with modern connections. "Legacy issues" such as ISA bus , super I / O chips (for keyboard, mouse, parallel interfaces, etc.) can be connected to the ICH via a standardized LPC interface . The already mentioned firmware hub also found its place here.

I0

For use on low-price motherboards with i810 Northbridge, Intel developed a stripped-down version of the ICH, the ICH0 (82801AB). It is limited to ATA / 33 and four PCI devices and does not support Wake on LAN .

I2

In 2000 , Intel's Northbridge i820 was shipwrecked. Customers were unwilling to pay the high prices for RDRAM and either bought cheap i810 motherboards or switched to the competition. VIA Technologies in particular was able to celebrate some successes with the Apollo Pro chipsets .

The hastily developed Northbridge i815 for PC-133 SDRAM became Intel's lifeline in the mid-range segment. You could either choose the ICH or the new ICH2 (82801BA) with 360 pins. For the first time, a Fast Ethernet chip (82559) was integrated into the Southbridge, which however required an external PHY chip in order to be able to establish the connection to the outside world. The ATA / ATAPI interface was accelerated to ATA / 100 and the number of USB ports doubled to four. The sound chip can now handle 6-channel sound.

There was also a mobile version of this chip, ICH2-M (82801BAM), which does its part to extend the battery life in notebooks . It supports several other ACPI energy-saving modes that go beyond the normal capabilities of the 82801BA, Intel's SpeedStep , and can reduce the clock rate of the connected PCI devices if necessary to save even more energy.

I3

The ICH3, released in 2001, was available in a server version ICH3-S (82801CA) in combination with the Northbridge E7501 and in the mobile version ICH3-M (82801CAM), which was sold with the Northbridges i830 and later the Mobile-i845 . There is no variant for desktop motherboards. Compared to the ICH2, the changes are limited to details: The ATA / ATAPI controller now supports native mode , up to six USB 1.1 devices can be connected, SMBus 2.0 and the latest SpeedStep version are supported and not required Devices can be switched off during operation. The chip has 421 pins.

I4

The ICH4 (82801DB) was Intel's Southbridge for 2002. The most important innovation was the support of USB 2.0 on all six ports. The sound chip was revised and complied with the latest AC97 specification, version 2.3. Like the previous generation, the ICH4 has 421 pins. From this southbridge there was again a mobile version ICH4-M (82801DBM).

I5

The ICH5 (82801EB) was used with the Northbridges i865 and i875 in 2003 . An integrated Serial ATA (SATA) host controller was new. The variant ICH5R (82801ER) also masters the Intel-specific matrix RAID with RAID 0 and RAID 1 on the SATA ports. There are eight USB 2.0 ports available. The chip now fully supports ACPI 2.0. It has 460 pins.

The hub interface introduced in 1999 with a data rate of 266 MByte / s increasingly developed into a bottleneck. In the new generation of chipsets, Intel therefore offered an optional port from a Gigabit Ethernet controller directly to the MCH . The aim of this technology, known as Communication Streaming Architecture , was on the one hand to reduce the latencies for Gigabit LANs through direct memory access, and on the other hand to keep the hub interface between ICH and MCH free as far as possible for hard disk and PCI data traffic, which is reaching the limits of its performance .

Since mid-2004, the major motherboard manufacturers in particular have noticed an increased rate of complaints for motherboards equipped with ICH5. The cause was the insufficient ESD resistance of certain ICH5 batches. Especially when connecting USB devices via front panels, the chips died in rows from static electricity discharges. Intel later responded to the problem by only delivering ICH5s with increased ESD tolerance. Regardless of this, effective ESD protective measures on USB ports are difficult and costly to implement anyway, as they can easily affect the signal quality of the USB 2.0 high-speed signal. With front panel USB connections, the necessary high quality fuses are therefore often left out for reasons of cost.

I6

The ICH6 (82801FB) was Intel's first PCI Express Southbridge. It provides four PCI Express x1 ports. Fast x16 ports for PEG graphics cards were housed in the MCH. The bottleneck hub interface has been replaced by a new Direct Media Interface (DMI) with 1 GByte / s per direction. Support for HDA is new . But AC97 and the classic PCI 2.3 are still supported to the usual extent. However, one ATA / ATAPI channel fell victim to the two additional SATA ports. The variant ICH6R (82801FR) supports the Intel-specific matrix RAID with RAID 0, RAID 1 and also RAID 10. The SATA controller of the ICH6R and the mobile version of the ICH6, the ICH6-M (82801FBM), supports AHCI . The chips have 652 pins.

Originally, Intel had planned to bring two more variants on the market under the names ICH6W and ICH6RW, which should contain a software access point for wireless LAN. These chips didn't show up in the end.

I7

ICH7 NH82801GB

The ICH7 (82801GB) was used together with Intel's latest high-end MCH, the i955X , from mid-2005 . New additions are two additional PCI Express x1 ports, an accelerated SATA controller for a transfer rate of up to 300 MB / s and support for Intel's Active Management Technology . The ICH7R (82801GR) now also supports RAID 5.

The ICH7 is also available in a “mobile” version, as the ICH7-M (82801GBM) and ICH7-M DH (Digital Home) as the 82801GHM, and the ICH7-U (Ultra) as the 82801GU. The "mobile" versions do not support Sata-II.

I8

ICH8 NH82801HBM

The ICH8 (6/2006) is offered in four different versions and is the southbridge to the 965 chips from Intel. With the ICH8 - with the exception of the mobile version - the traditional ATA / ATAPI interface and AC97 are finally dispensed with. In practice, however, most mainboard manufacturers would still like to support ATA / ATAPI and offer corresponding connection options via additional chips from JMicron or Marvell .

The ICH8 is the first ICH to master eSATA and Gigabit Ethernet (previously housed in the MCH). The basic version ICH8 (82801HB) has only four SATA II ports. The ICH8R (82801HR), which of course offers RAID, has, like the rest of the chips, the option of connecting six SATA devices. In addition, the ICH8DH (82801HDH) - Digital Home - has Quick Resume and is used together with the P965 or G965 in Viiv-certified systems. The ICH8DO (82801HDO) - Digital Office - together with Northbridge Q965 forms the basis for vPro .

I9

ICH9 AF82801IBM

The ICH9R (82801IR) came on the market in May 2007 in the P35 chipset . Just like the ICH8, it no longer offers ATA / ATAPI ports, but in practice most mainboard manufacturers still want to support ATA / ATAPI and offer corresponding connection options (as with the ICH8) via additional chipsets.

I10

The ICH10 will start in 2008 in conjunction with the Intel P45 chipset . There are no major innovations compared to the previous ICH9, which is why the high-end X48 chipset still relies on the ICH9.

Combinations

Although any ICH can be combined with almost any MCH, typical combinations have manifested:

Model overview

model production PATA SATA RAID modes AHCI USB PCI slots Ethernet Audio TDP Others
I k. A. 4 × ATA-66 - - ? 2 × USB 1.1 6th - AC97 k. A. -
I0 k. A. 4 × ATA-33 - - ? 2 × USB 1.1 4th - AC97 k. A. -
I2 k. A. 4 × ATA-100 - - ? 4 × USB 1.1 6th 1 × 100 Mbit AC97 k. A. -
ICH2-M k. A. 4 × ATA-100 - - ? 4 × USB 1.1 6th 1 × 100 Mbit AC97 k. A. SpeedStep
ICH3-S k. A. 4 × ATA-100 - - ? 6 × USB 1.1 6th 1 × 100 Mbit AC97 k. A. -
ICH3-M k. A. 4 × ATA-100 - - ? 6 × USB 1.1 6th 1 × 100 Mbit AC97 k. A. SpeedStep
I4 k. A. 4 × ATA-100 - - ? 6 × USB 2.0 6th 1 × 100 Mbit AC97 k. A. -
ICH4-M k. A. 4 × ATA-100 - - ? 6 × USB 2.0 6th 1 × 100 Mbit AC97 k. A. SpeedStep
I5 180 nm 4 × ATA-100 2 × SATA-I - ? 8 × USB 2.0 6th 1 × 100 Mbit AC97 2.4 W. -
ICH5R 180 nm 4 × ATA-100 2 × SATA-I 0, 1 ? 8 × USB 2.0 6th 1 × 100 Mbit AC97 2.4 W. -
I6 180 nm 2 × ATA-100 4 × SATA-I - ? 8 × USB 2.0 6th 1 × 100 Mbit HDA 3.8 W. -
ICH6R 180 nm 2 × ATA-100 4 × SATA-I 0, 1, 10 Y 8 × USB 2.0 6th 1 × 100 Mbit HDA 3.8 W. -
ICH6-M 180 nm 2 × ATA-100 4 × SATA-I - Y 8 × USB 2.0 6th 1 × 100 Mbit HDA 3.8 W. SpeedStep
I7 130 nm 2 × ATA-100 4 × SATA-II - N 8 × USB 2.0 6th 1 × 100 Mbit HDA 3.3 W -
ICH7DH Y
ICH7R 130 nm 2 × ATA-100 4 × SATA-II 0, 1, 10, 5 Y 8 × USB 2.0 6th 1 × 100 Mbit HDA 3.3 W -
ICH7-U 1 × ATA-100 N
ICH7-M DH Y
ICH7-M 1 × ATA-100 2 × SATA-I Y
I8 130 nm - 4 × SATA-II - (Y) * 8 × USB 2.0 6th 1 × 1000 Mbit HDA 4.1 W -
ICH8R 130 nm - 6 × SATA-II 0, 1, 10, 5 Y 8 × USB 2.0 6th 1 × 1000 Mbit HDA 4.1 W -
ICH8DH 130 nm - 6 × SATA-II 0, 1, 10, 5 ? 8 × USB 2.0 6th 1 × 1000 Mbit HDA 4.1 W Viiv
ICH8DO 130 nm - 6 × SATA-II 0, 1, 10, 5 ? 8 × USB 2.0 6th 1 × 1000 Mbit HDA 4.1 W vPro
I9 130 nm - 4 × SATA-II - (Y) * 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.3 W -
ICH9R 130 nm - 4 × or 6 × SATA-II 0, 1, 10, 5 Y 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.3 W Intel Turbo Memory
ICH9DH 130 nm - 4 × or 6 × SATA-II - ? 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.3 W -
ICH9DO 130 nm - 4 × or 6 × SATA-II 0, 1, 10, 5 ? 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.3 W Intel Turbo Memory
I10 130 nm - 6 × SATA-II - ? 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.5 W -
ICH10R 130 nm - 6 × SATA-II 0, 1, 10, 5 Y 12 × USB 2.0 6th 1 × 1000 Mbit HDA 4.5 W Intel Turbo Memory

(* AHCI available, but not activated (license / marketing), see among others ASUS P5K (ICH9 - AHCI was still available in the first BIOS, not anymore in the later ones); CrossFlash possible with BIOS from ASUS P5KR (ICH9R, otherwise identical to P5K ))

Individual evidence

  1. heise online: Increased failure rates for mainboards with some Intel chipsets (May 19, 2005)