Mesa transistor

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Mesa transistors in the Deutsches Museum Bonn

Under a Mesatransistor ( English mesa transistor ) refers to a group of the bipolar transistors , in which, after the production of the base and emitter regions, the environment can be chemically etched to the collector and thus the characteristic shape of a mesa ( Spanish mesa = panel) as well as improved electrical properties compared to the transistor types customary at the time.

description

Schematic cross section through a diffusion mesa transistor in a linear arrangement

The base and emitter regions were two main diffusion method produced: diffusion alloying process (Engl. Diffused-alloy process ) and double diffusion method (Engl. Double-diffused process ). It is therefore one of the group of diffusion transistors . In the early days, mesa transistors were initially made from monolithic germanium , which also has a higher charge carrier mobility than silicon . In the 1950s, silicon did not have its current dominance as a semiconductor material and was used to a lesser extent in the mesa transistor. Epitaxial variants followed later . Nowadays, mesa transistors are rarely used.

history

Although diffusion techniques had previously been used in the manufacture of transistors, it was only the development of the oxide masking process by Carl Frosch and Lincoln Derick that led to the development of the mesa transistor, which was developed in 1954 by Charles A. Lee , GC Dacey and PW Foy, all employees at Bell Telephone Laboratories (BTL). In Germany, Siemens introduced the mesa technology in 1959 and developed a new manufacturing process using a shifting technique with extremely fine masks.

The mesa transistor got its name from its appearance, which is similar to the table mountains in Mesa (Arizona) ( Spanish mesa = table, see Mesa (semiconductor technology) ). The name itself is said to have been mentioned as early as 1954 by James M. Early , who at the time headed the transistor development group at BTL.

The mesa transistor represents a significant advance over earlier transistor types, mainly because of the precision with which the depth of the blocking zone could be controlled by diffusion. This made it possible to reduce the width of the base zone produced by diffusion to 5 µm and smaller, about a tenth of what was previously possible. This resulted in improved performance at higher frequencies and an increase in the cutoff frequency above 100 MHz.

production

Templates for the production of mesa transistors

Mesa transistors were manufactured as both npn and pnp transistors. Germanium and silicon were the main semiconductor materials used in the 1950s. In the following, the essential steps for the production of an npn transistor using the double diffusion process are described; these differ in comparison to the production of a pnp transistor essentially only in terms of the basic materials and dopants used . It should be noted that the description is only a possibility of the manufacturing process from the early years, which in one or the other sub-step can differ from processes used later. For example, the material-selective masking of thermal silicon dioxide was also used for diffusion doping.

The manufacture of an npn mesa transistor from silicon begins with the drawing of an n-doped silicon ingot and the sawing of the appropriate wafers . After the thermal oxidation of the silicon wafer, a p-doped area is produced on the silicon surface of the entire wafer, for example by diffusing gallium (through the silicon dioxide) from gallium (III) oxide (Ga 2 O 3 ) in a moist atmosphere in a diffusion furnace . The n-doped substrate later represents the collector and the p-doped region the base of the bipolar transistor. A second diffusion step is necessary for the production of the emitter region or the second pn junction. For this purpose, a photoresist mask is first applied, structured and the silicon dioxide underneath is etched in the unmasked areas using a wet chemical process. After the photoresist mask has been removed, the second diffusion process follows in the same type of furnace. An n-doping foreign substance is diffused into the silicon, e.g. B. Phosphorus from the starting material phosphorus pentoxide (P 2 O 5 ) this time in a dry atmosphere. Since diffusion is severely hindered by the oxide layer, diffusion into the silicon only takes place in the previously exposed areas (material-selective diffusion). Furthermore, it is important that the second diffusion zone is significantly flatter than the first (the base) and has a significantly higher doping concentration, so that counter-doping and thus the npn structure is actually achieved. The individual areas of the layer sequence are then contacted. As a rule, different materials are used to contact the differently doped areas in order to reliably generate an ohmic contact . The p-doped base is typically aluminum, and the n-doped emitter region with silver or gold - antimony - alloy contacted. (U a reduction of.. In the last step of the electrical characteristics is used to improve the barrier layer - capacity , improvement of the high-frequency power) the top layers of the transistor wet chemically etched until the contact point of the dopant materials with the semiconductor crystal. Etching the sides gives the transistor the appearance of a table mountain.

properties

The working range of the mesa transistor is limited to a comparatively thin region on the surface. To maintain a high breakdown voltage between base and collector, a relatively high collector resistance is necessary. Since the collector connection of the mesa transistor is usually attached to the opposite side of the substrate, which is thick (in relation to the active area), the value of the collector path resistance is also high. This results in a reduction in the power rating of the component. The attempts to reduce the substrate thickness led to stability problems of the semiconductor substrate and to a lower production yield. The problems were only solved with the planar transistor or epitaxial transistor .

The exposed parts of the collector-base junction at the surface degrade the performance of the transistor. The cause is a high surface leakage current and a low breakdown voltage. The barrier layer, which is unprotected against influences from the environment, also leads to unstable transistor properties, causes a drift of the barrier layer currents, an increase in leakage currents and a reduction in the current gain. The reliability problems for silicon transistors were quickly overcome when the group around Martin M. Atalla (also at BTL) showed in 1959 that a thermally grown silicon dioxide layer passivated the surface. The layer could also be produced during the diffusion process of the base and emitter layers. The first transistor to use this technique, however, was an oxide passivated bipolar planar transistor (Fairchild Semiconductor 2N696, originally a mesa transistor) by Jean Hoerni .

The advent of the planar transistor has not completely supplanted the mesa transistor. The mesa transistor continued to be used when very high reverse breakdown voltages of several thousand volts were required, for example in power transistors.

When designing the base and emitter electrodes, a distinction is made between two geometries: a linear and a circular arrangement. In the case of circular geometry , the emitter electrode is in the center of the circular base electrode. In the linear arrangement (English linear / stripe geometry ), the two strip-shaped electrodes are parallel to each other (English 2-stripe mesa ). The latter were typically used for high frequency applications. They are also easier to design and take up less space.

literature

  • Peter R. Morris: A history of the world semiconductor industry (= IEE History of Technology Series. 12). Peregrinus, London 1990, ISBN 0-86341-227-0 , pp. 36-37.
  • Chih-Tang Sah : Fundamentals of solid-state electronics. World Scientific, Singapore et al. a. 1991, ISBN 981-02-0637-2 , pp. 709 ff.

Web links

Commons : Mesa transistor  - collection of images, videos and audio files

Individual evidence

  1. ↑ Entertainment policy at the Deutsches Museum Bonn
  2. ^ Charles A. Lee: A high-frequency diffused base germanium transistor . In: The Bell System Technical Journal . tape 35 , no. 1 , 1956, pp. 23–24 ( digitized from archive.org [accessed November 7, 2015]).
  3. ^ Cor L. Claeys, Fernando González, Junichi Murota, Pierre Fazan, Rajendra Singh (eds.): ULSI process integration III. Proceedings of the international symposium (= Electrochemical Society. Proceedings Volume. 2003-6). Papers presented at the Third Symposium on ULSI Process Integration held in Paris, France at the 203rd meeting of the Electrochemical Society, April 28 - May 2, 2003, Electrochemical Society, Pennington NJ 2003, ISBN 1-56677-376-8 , pp. 24 ff.
  4. ^ Bo Lojek: History of Semiconductor Engineering . Springer, Berlin a. a. 2007, ISBN 978-3-540-34257-1 , pp. 57 .
  5. ↑ a b c Chih-Tang Sah: Fundamentals of solid-state electronics . 1991, p. 709 .
  6. ^ Peter R. Morris: A history of the world semiconductor industry . 1990, p. 36 .
  7. ↑ Joseph F. Aschner, Charles A. Bittmann, WFJ Hare, Joseph J. Kleimack: A Double Diffused Silicon High-Frequency Switching Transistor Produced by Oxide Masking Techniques . In: Journal of The Electrochemical Society . tape 106 , no. 5 , 1959, pp. 415-417 , doi : 10.1149 / 1.2427370 .
  8. ^ A b Bo Lojek: History of Semiconductor Engineering . Springer, Berlin 2007, ISBN 978-3-540-34257-1 , pp. 62-64, 111 .