IDT WinChip
| IDT WinChip | |
|---|---|
 IDT WinChip logo |
|
| Production: | 1997 to 1999 |
| Producers: | |
| Processor clock: | 180 MHz to 250 MHz |
| FSB cycle: | 60 MHz to 100 MHz |
| L1 cache size: | 64 KB to 128 KB |
| Instruction set : | x86 |
| Microarchitecture : | RISC |
| Base: | Base 7 |
WinChip is the name of a processor family for socket 7 that was developed by Centaur Technology and marketed by IDT . The CPUs were developed with the focus on the lowest possible production costs. To which had the face as small as possible, which meant that the architecture is very simple had. The WinChip CPUs were therefore not particularly fast, but had very low power consumption, little heat generation and hardly any errors.
In Germany, however, these processors were not allowed to be traded under this internationally common name, because a business-minded fellow human being in Germany had himself protected from IDT and, from June 1999, carried out one of the first mass warnings of the Internet age through a Munich law firm. IDT therefore only sold the CPUs in Germany with the shortened names C6, W2 and W2A.
Models
WinChip C6
In 1997 the IDT WinChip C6 was launched. The C6 had a very simple design and was by and large just a "drilled out" 80486 . All advances in modern CPU architectures such as out-of-order execution , branch prediction , return stack or the like were deliberately left out in order to make the architecture as simple as possible. Nevertheless, thanks to the MMX technology and the very moderate power consumption (despite single voltage, passive cooling at 240 MHz was possible without any problems) , the CPU was an asset to the market.
The execution speed was very below average and in the integer range on the level of the Intel Pentium MMX , the floating point performance (FPU) was not competitive. Since the CPUs did not require a multi-voltage supply ("split voltage mainboards"), they could run without major problems in older Socket 5 mainboards and could thus be used as a relatively inexpensive upgrade CPU.
WinChip 2
In 1998, the IDT WinChip 2 (C6 +) was introduced as the successor . The WinChip 2 was an improved C6, u. a. the number of FPU and MMX units has been doubled and a jump prediction has been incorporated. These measures noticeably increased the execution speed ("performance"), so that the WinChip 2 was able to hold its own against the competition much better than the WinChip C6. However, the AMD K6-2 was clearly left behind, so the WinChip 2 was positioned as a direct competitor to the Cyrix 6x86MX & MII. In addition, the WinChip 2 was the first CPU after the AMD K6-2 to master 3DNow . Since better (smaller) manufacturing technology was used, the CPU could be produced just as cheaply as its predecessor despite the improvements. The WinChip 2 was also suitable as an upgrade CPU for socket 5 mainboards, as it still did not require a "split voltage".
WinChip 2 A / B and 3
From the WinChip 2 there were then the slightly modified versions 2A and 2B, each of which brought only minor changes. The WinChip 2A supports an FSB with a clock rate of 100 MHz ( Super Socket 7) and additional non-integer multipliers (x2.33 and x2.66) to enable clock frequencies of 233 or 266 MHz. The WinChip 2B was the first Centaur CPU to require split-voltage mainboards; Of course, the changes to the WinChip 2A were also integrated. The next evolutionary stage was the IDT WinChip 3 in 1999 with an L1 cache that was enlarged from 64 KB to 128 KB . Further changes to the architecture were not planned.
The WinChip 3 did not get beyond the prototype status, as Centaur Technology was sold to VIA Technologies in mid-1999 . Instead of the WinChip 3, the VIA Cyrix III was launched as the next CPU .
Model data
IDT WinChip C6
The IDT WinChip C6 225 MHz
|
- L1 cache: 32 + 32 KB (data + instructions)
- MMX
- Base 7 ( base 5 possible without any problems)
- Single voltage
- Special features: very simple RISC architecture
- Front Side Bus : 60, 66 and 75 MHz
- Release DATE: October 1997
- Manufacturing technology: 0.35 µm at IBM and IDT
- The size: 88 mm² with 5.4 million transistors
- Clock rates: 180, 200, 225 and 240 MHz
IDT WinChip 2
- Code name: W2, C6 +
- L1 cache: 32 + 32 KB (data + instructions)
- MMX , 3DNow
- Base 7 ( base 5 possible without any problems)
- Single voltage
- Special features: very simple RISC architecture
- Front Side Bus : 60, 66 and 75 MHz
- Release DATE: September 1998
- Manufacturing technology: 0.35 µm (later 0.25 µm) at IBM and IDT
- The size: 95 mm² (58 mm² at 0.25 µm) with 5.9 million transistors
- Clock rates: 200, 225 and 240 MHz
IDT WinChip 2A
The one winchip 2A 233 MHz
|
- Code name: W2A
- L1 cache: 32 + 32 KB (data + instructions)
- MMX , 3DNow
- Super Socket 7 (100 MHz FSB)
- Single voltage
- Special features: very simple RISC architecture
- Front Side Bus : 66 and 100 MHz
- Release DATE: March 1999
- Manufacturing technology: 0.25 µm at IBM and IDT
- The size: 58 mm² with 5.9 million transistors
- Clock rates:
- PR200: 200 MHz
- PR233: 233 MHz
- PR300: 250 MHz
IDT WinChip 2B
- Code name: W2B
- L1 cache: 32 + 32 KB (data + instructions)
- MMX , 3DNow
- Super Socket 7 (100 MHz FSB)
- Dual voltage
- Special features: very simple RISC architecture
- Front Side Bus : 66 and 100 MHz
- Release DATE: March 1999
- Manufacturing technology: 0.25 µm at IBM and IDT
- The size: 58 mm² with 5.9 million transistors
- Clock rates:
- PR200: 200 MHz
- PR233: 233 MHz
- PR300: 250 MHz
IDT WinChip 3
- Code name: W3
- L1 cache: 64 + 64 KB (data + instructions)
- MMX , 3DNow
- Super Socket 7 (100 MHz FSB)
- Dual voltage
- Special features: very simple RISC architecture
- Front Side Bus : 100 MHz
- Publication date: No longer published due to sale to VIA Technologies
- Manufacturing technology: 0.25 µm at IBM and IDT
- The size: 75 mm² with an unknown number of transistors
- Clock rates:
- PR300: 250 MHz
Individual evidence
- ↑ Article at heise online . June 23, 1999.