Universal Asynchronous Receiver Transmitter

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UART INS8250 on a circuit board . The RS-232 interface driver 1489/88 can be seen in the upper area of ​​the screen.

Universal Asynchronous Receiver Transmitter , or UART for short (pronunciation: ʊəˡat or ˡju art ), is an electronic circuit that is used to implement digital serial interfaces . This can be an independent electronic component (a UART chip or module ) or a function block of a more highly integrated component (e.g. a microcontroller ).

A UART interface is used to send and receive data via a data line and forms the standard for the serial interfaces on PCs and microcontrollers . The interface with various interfaces (e.g. RS-232 or EIA-485 ) is also very common in the industrial sector .

The data is transmitted as a serial digital data stream with a fixed frame, which consists of a start bit, five to a maximum of nine data bits, an optional parity bit to detect transmission errors and a stop bit. The transmitter does not need to inform the receiver of the transmission cycle via its own control line. Instead, the receiver calculates the clock of the transmitter from the clock of the data line and synchronizes itself with it with the help of the start and stop bits. Usually the stop bit can be configured to be 1.5 or 2 times the normal transmission time of a bit. This is referred to as 1.5 or 2 stop bits and must be set equally at both the transmitter and the receiver. Because the receiver recalculates the sender's clock rate with each received byte and synchronizes itself to it every time, large differences in the clock rate between the sender and receiver can also be compensated for. Even short-term clock fluctuations are quickly compensated for. This is why this type of data transmission is called "asynchronous" and this type of synchronization is called "byte synchronous".

Asynchronous data transmission processes and implementation as an integrated circuit

The asynchronous serial data stream as generated by a so-called CMOS-UART (logic 0 and 1). The diagram below shows the inverted voltage level on the RS-232 interface.
Usual bit rates
Bit rate Bit duration
50 bit / s 20.0 ms
110 bit / s 9.09 ms
150 bit / s 6.67 ms
300 bit / s 3.33 ms
1,200 bit / s 833 µs
2,400 bit / s 417 µs
4,800 bit / s 208 µs
9,600 bit / s 104 µs
19,200 bit / s 52.1 µs
38,400 bit / s 26.0 µs
57,600 bit / s 17.4 µs
115,200 bit / s 8.68 µs
230,400 bit / s 4.34 µs
460,800 bit / s 2.17 µs
921,600 bit / s 1.08 µs
2,000,000 bit / s 500 ns
3,000,000 bit / s 333 ns

Asynchronous operation (start-stop operation)

The special feature of the asynchronous mode of operation is that the transmitter does not transmit its own clock signal to the receiver on its own control line. Instead, the receiver synchronizes itself over the length of the frame, mediated by the leading edge of the new start bit after the last received stop bit, as well as the set baud rate (which in this case corresponds to the bit rate ). Because the start of a transmission with the start bit can take place at any time, this serial interface is referred to as asynchronous . In order to be able to guarantee synchronization, the number of data bits that can be transmitted within a frame is limited. If more than one byte were packed into a frame, the synchronization could be lost, which could lead to misinterpretations of the data stream and thus to incorrect transmission. If no data is to be transmitted during a transmission pause, the transmitter sets the line to the polarity of the stop bit. Because the receiver is re-synchronized with each transmitted frame, it is not necessary that there is a temporal relationship between the transmitted frames. The transmitter and receiver only have to work synchronously for the duration of a single frame, no longer. This is called "byte synchronous " or character synchronous .

Serial interfaces in synchronous operation do not require a frame of start / stop bits. You ensure the synchronicity of the participants in other ways, for example by using an additional clock line or by recovering the clock from the line code .

Serial interface

The history of the UART is closely related to the standardization of data communication from RS-232. The first UARTs were intended for data transmission rates of less than one hundred bit / s and connection to Teletypes with power interfaces or modems , but in later years they achieved several megabits per second as independent chips. Asynchronous transmission is used in data communication with the RS-232 interface. This interface is comparatively widespread. A UART generates the data bits to be transmitted on the RS-232 interface and the data frames required for this. The actual RS-232 interface also consists of level converters and other components such as plugs, which are no longer part of a UART.

So that UART modules can communicate, the receiving line (Rx) of one module and the transmission line (Tx) of the other module must be opposite at the connector. This means that two types of pin assignment (master and slave) are always required, even if the devices communicate with equal rights. If the master is to be able to communicate with master or slave with slave, cross connectors (analogous to the null modem cable of the serial interface or the crossover cable of the Ethernet) are required.

A modification, the single-wire UART (SWART), avoids this polarity reversal problem. If Rx and Tx are combined together on one pin, only simplex transmission is possible, but any modules can then communicate with one another. Several UART modules can even communicate on one wire (SWART bus). The SWART is particularly suitable for short distances and for data rates up to 115,200 baud.


A UART is usually implemented as a communication module in microcontrollers , or in computers as an independent integrated circuit , as a sub-function in chipsets , in the form of hardware description languages for integration in Field Programmable Gate Arrays (FPGAs) or as a so-called "software UART" that only works through a program sequence exists and controls certain input / output pins directly ( bit banging ). The data to be transmitted or received are usually supplied to the UART in parallel, for example via a bus external to the CPU .

A UART component that has been used as an independent component in commercially available PCs for many years is the UART 8250 developed by National Semiconductor and its compatible successors 16450 and 16550. In addition to the receiver and transmitter, the 16550 also includes a FIFO as an extension . Buffer memory that minimizes the overflow of the receive buffer at high bit rates. In addition, the controlling processor is interrupted less often by interrupts, which increases the efficiency of the program flow. Since the mid-1990s, UART controllers have rarely been used in PCs as independent integrated circuits, since the serial interfaces are housed in the chipset ( southbridge ) of the mainboard.


In addition to the actual UART, there are other interface modules based on the UART. Common names are DUART , the abbreviation stands for Dual Universal Asynchronous Receiver Transmitter , which combines two UARTs in a single microchip . USART (pronunciation: ʊəˡsat or 'ju sart ) stands for Universal Synchronous / Asynchronous Receiver Transmitter and also offers the option of synchronous data transmission .

In simple microcontroller systems, data is frequently exchanged via UART interfaces that are implemented without handshake , only via Rx and Tx, and without the level converter required for RS-232 . Since there is no inversion with the level converters, communication takes place via non-inverted TTL levels or CMOS levels . This implementation, which is also known as CMOS-UART or TTL-UART , is suitable for short distances and is supported by practically all microcontrollers and can also be implemented using software at correspondingly low transmission rates ( bit banging ).

The connection of GPS receivers via CMOS-UART is also common in the commercial sector .


  • AP Godse, DA Godse: Microprocessors and Microcontrollers . Technical Publishing Pune, 2007, ISBN 978-81-8431-297-3 .
  • Hans-Peter Messmer, Klaus Dembowski: PC hardware book. 7th edition. Addison-Wesley Verlag, Munich 2003, ISBN 3-8273-2014-3 .
  • Jerry D. Gibson (Ed.): Mobile Communications Handbook . 3. Edition. Taylor & Francis Group, Boca Raton 2013, ISBN 978-1-4398-1723-0 .
  • Hans Liebig, Thomas Flik: Computer organization . Principles - Structures - Algorithms, 2nd edition, Springer Verlag, Berlin / Heidelberg 1993, ISBN 3-540-54632-4 .
  • Friedrich Wittgruber: Digital interfaces and bus systems. Introduction to technical studies. Friedrich Vieweg & Sohn Verlag, 1999, ISBN 3-528-07436-1 .

Web links


  1. Data sheet PC16450C / NS16450, PC8250A / INS8250A (PDF; 677 kB)