Hardware description language
A hardware description language ( English Hardware Description Language , HDL ) is a formal language , with the operations of integrated circuits can be described and their design and tested in simulations.
Hardware description languages express a behavior over time and / or a (spatial) circuit structure in normal text. In contrast to software programming languages , the syntax and semantics of the HDLs in their notation contain possibilities for expressing temporal sequences and simultaneities, as is required by hardware . Languages whose only characteristic is to reproduce the connections of circuits in the form of netlists are called netlist languages .
Demarcation
The term programming is regularly (and incorrectly) used synonymously for writing a hardware description. This results from the fact that HDLs are an executable specification of a particular piece of hardware. A simulation program, which provides the basic semantics of language and the passage of time, provides the electronics designer with the opportunity to model a piece of hardware before it is physically manufactured. This possibility of execution makes it appear as if this language is being used to program something. There are HDLs and simulators for modeling in digital and analog technology .
It is possible to semantically describe hardware in a common language such as C ++ , in conjunction with extensive class libraries. SystemC pursues this approach , which is currently only capable of synthesis in exceptional cases and is primarily used in the academic field. Normal C ++, on the other hand, does not contain any options for describing the passage of time and is therefore not very suitable.
application
One reason for using a general HDL is the ability to automatically generate net lists for integrated circuits using a synthesis tool . Circuits can also be easily implemented in programmable components such as Field Programmable Gate Arrays (FPGAs) or in application-specific integrated circuits (ASICs).
For the synthesis of the circuit , the generation of a network list, only part of the language, in terms of syntax and semantics, is typically suitable. In the area of digital switching, logic synthesis is preferred . The remaining parts of the language are suitable for easier modeling of a test environment for verification of functionality in simulation programs. An example of a language construct that cannot be synthesized is the input and output of files (file I / O), which is only available in the simulation environment. The specific extent of which parts of the language are still capable of synthesis depends on the synthesis tools used. In the early days of logic synthesis, digital multiplications could not be synthesized directly. The tools available in 2008 usually master the direct synthesis of the multiplication operation in hardware.
The following abstraction levels are used:
- Behavioral model ( behavioral , partly not capable of synthesis)
- Register transfer level ( RTL model, capable of synthesis)
- Gatelevel model (netlist)
Well-known examples
The first hardware description languages (around 1977) were ISP (Instruction Set Processor) from Carnegie Mellon University , and KARL, from the University of Karlsruhe , later further developed at the Technical University of Kaiserslautern . ISP was similar to a software programming language and was used to describe the input / output behavior for the simulation. However, this makes it hardly usable for synthesis. The KARL language and its implementation also included a design calculation to support “VLSI chip floorplanning” and structured hardware design. It also forms the basis of KARL's interactive graphic sister language ABL, implemented in the early 1980s at the CSELT research center in Turin , Italy, as the graphic VLSI design system ABLED. In the mid-1980s, an EU-funded consortium implemented a complete “VLSI design framework” around KARL and ABL. In 1983, Data-I / O introduced the ABEL language to describe logic systems and switching mechanisms (finite state machines). Verilog and VHDL are currently some of the most widely used languages worldwide and have established themselves as industry standards.
See also
literature
- Reiner Hartenstein : Fundamentals of Structured Hardware Design. A Design Language Approach at Register Transfer Language . North Holland Publ. Co./Elsevier Scientific, Amsterdam / New York 1977, ISBN 0-444-85007-4 .
- Jean P. Mermet (Ed.): Fundamentals and Standards in Hardware Description Languages . Kluwer Academic Publishers, Dordrecht 1993, ISBN 0-7923-2513-3 .
Web links
Individual evidence
- ^ Barbacci, M. "The ISPS Computer Description Language," Carnegie-Mellon Univ., Dept. of Computer Science, 1977
- ↑ J. Mermet (editor): Fundamentals and Standards in Hardware Description Languages (Springer Verlag, 1993)