Just Another Hardware Definition Language
JHDL is the abbreviation for Just Another Hardware Definition Language and is a hardware description language that was developed as an open source project in 1997 at Brigham Young University .
The idea of JHDL is to convert programs written in Java into VHDL in such a way that an FPGA programmed with it (or networked FPGAs) achieves a data flow described by the objects of the program between the physical connections of an electronic component .
It is also the aim that objects are created in the available FPGA networks exactly as they are in normal Java programs, namely through instructions of the form Object reference = new ObjectType(Parameters)
. By simply forgetting the reference, the resource area used by it (in the case of JHDL logic gates ) is released again.
JHDL is particularly interesting in connection with self- configuring systems in which an operating system works on a hardware platform that consists of many FPGAs and can be reconfigured. Many objects and a large number of threads exist simultaneously in such a network , which can possibly be used to reduce the clock frequency .
Web links
- The JHDL project page (English)