Cadence Design Systems

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Cadence Design Systems

logo
legal form Corporation
ISIN US1273871087
founding 1988
Seat San Jose (California)
management Lip-Bu Tan, President / CEO
Number of employees 4950 (2011)
sales $ 1.702 billion (2015)
Branch Software manufacturer
Website www.cadence.com

Headquarters in San Jose

Cadence Design Systems, Inc is one of the world's largest providers of EDA software, based in San Jose , USA .

The company primarily offers software specializing in the design and verification of chips and electronic circuit boards, and in recent years increasingly IP cores as well as services in the development and verification of hardware.

history

In 1995 the company decided to convert the hardware modeling language for ASICs and FPGAs “ Verilog HDL ” into a free standard. This was adopted in the same year as IEEE Standard 1364–1995 (Verilog-95).

Taking over smaller companies has always been part of business policy. Most of the time, the product range was expanded directly by the products of the acquired company. Recent acquisitions are:

  • 1988: foundation
  • 1999: Takeover of OrCAD , which offered the software of the same name for developing printed circuit boards as the market leader. Cadence today sells OrCAD products as part of the Allegro platform.
  • 2003: Takeover of Verplex Systems, a provider of software for formal verification and equivalence checks.
  • 2005: Acquired Verisity, Ltd, a provider of verification software.
  • 2008: Takeover of ChipEstimate, a developer of chip planning software and IP management.
  • 2013: Takeover of Tensilica .
  • 2020: Takeover of AWR for the design and simulation of high-frequency electronics.

Web links

Individual evidence

  1. ^ Cadence Completes Acquisition of AWR Corporation from National Instruments. In: cadence.com. January 15, 2020, accessed on July 21, 2020 .
Programmable logic
Concepts

ASIC  • SoC  • FPGA ( CLB ) • CPLD  • EPLD  • PLA  • PAL  • GAL  • PSoC  • Reconfigurable Computing ( Xputer ) • Soft microprocessor  • Circuit underutilization  • High-level synthesis  • Hardware acceleration

Programming technology

Mask-programmed  • Antifuse  • EPROM  • E²PROM  • Flash  • SRAM

Programming languages

Verilog ( A , AMS ) • VHDL ( AMS , VITAL ) • SystemVerilog ( DPI ) • SystemC  • AHDL  • Handel-C  • PSL  • UPF  • PALASM  • ABEL  • CUPL  • OpenVera  • C to HDL  • Flow to HDL  • MyHDL  • JHDL  • ELLA

Manufacturer

Accellera  • Actel  • Achronix  • AMD  • Aldec  • Atmel  • Cadence  • Cypress  • Duolog  • Forte  • Intel ( Altera ) • Lattice  • National  • Mentor Graphics  • Microsemi  • Signetics  • Synopsys ( Magma , Virage Logic ) • Texas Instruments  • Tabula  • Xilinx

Products
hardware

iCE  • Stratix  • Cyclone  • Arria  • Max  • Kintex  • Zynq  • Virtex

software

Intel Quartus Prime  • Xilinx ISE  • Xilinx Vivado  • ModelSim  • VTR

IP
Proprietary

ARC  • ARM Cortex-M  • PowerPC  • LEON  • LatticeMico8  • MicroBlaze  • PicoBlaze  • Nios  • Nios II

Open source

JOP  • LatticeMico32  • OpenCores  • OpenRISC  • RISC-V  • Zet