The term multi-core processor (derived from the English term also multicore processor or multi-core processor ) describes a microprocessor with more than one complete processor core in a single chip . The processor core components with the exception of the bus and possibly some caches are present several times. There are therefore several (largely) complete, largely independent CPU cores including their own register sets and arithmetic-logical units (ALU).
A dual core processor (also known as dual core processor ) is a multi-core processor with two processor cores. Microprocessors with a CPU core are referred to as single-core processors (also single-core processors ). Microprocessors with three cores are called triple-core processors or three-core processors. This terminology can be continued accordingly. With four cores one speaks of a four-core processor (also quad-core processor ), whereby a four-core processor can consist of two double-core processors or four independent cores.
Multi-threaded CPUs are multifilament (engl. Multithreaded ) processor cores with a plurality of program counters and registers records, but login to the system as a plurality of cores. This technology can be implemented with varying degrees of efficiency depending on the complexity of the processor design. Intel calls them Hyper-Threading , IBM SMT (symmetrical multi-threading) in some processor lines . The IBM Power5 processor is e.g. B. a dual core processor with two threads per core, the Sun UltraSPARC-T1 processor an eight core processor with four threads per core. In contrast to real multi-core processors, the “cores” here share some execution units, such as the floating point arithmetic unit or even the ALU. Then a “core” may have to wait when the other is currently occupying this unit.
It is not precisely defined which resources a core must have “private” in order to be considered “independent” and “full”.
Until 2005, single core processors dominated the PC area. Previously, attempts were seldom made to increase performance by using two or more individual processors. Instead, in addition to new instruction sets such as MMX, the focus was on increasing the clock frequency . However, from frequencies of around 4 GHz, the resulting waste heat could no longer be handled sensibly. One possibility for further development was the introduction of multi-core processors. In the second half of 2006, the offer in the upper half of the performance spectrum of PC processors was dominated by the dual core variant. This marked a departure from a principle that had been in force since the birth of processors. Single cores are only installed in a few cases, since the corresponding multi-cores are insignificantly more expensive.
Sense and purpose
Multi-core processors were developed because an increase in computing power through higher clock frequencies caused major technical problems. It is also less expensive to implement multiple cores in one chip than having multiple processor sockets on the motherboard . Viewed differently, the same number of chip sockets and chips can theoretically achieve a multiplied computing power ( n times with n cores). In reality, however, this increase can hardly be achieved. The actual increase in performance depends primarily on how well the software is parallelized . The access of several active cores to the common memory can lead to bottlenecks and performance limits, but highly developed cache strategies are used.
In addition to increasing the clock frequency and pipelining, multi-core processors represent one of many possibilities for increasing the performance of microprocessors. The purely theoretical increase in performance is comparatively efficient and amounts to a maximum of 100% (compared to a single core) per additional core. In practice, the increase in performance depends heavily on the degree of parallelization of the program being executed and the operating system used. Unix , the SMP - Linux kernel and Microsoft Windows XP and above support multi-core processors (Windows NT and 2000 recognize a multi-core processor as several single-core processors; this means that all cores can be used, but special multi-core processor optimizations were not effective). The operating system distributes processes and applications to the individual processors, which then run them independently in parallel. If, on the other hand, only one application is executed, it must be parallelized for the multiple processors. This means that the application is modified in such a way that it is executed completely or only fragments of it at the same time on several processors as threads .
This is how different architectures differ. While some architectures accommodate performance-enhancing components such as a shared cache on the chip (such as IBM's POWER4 and the following, Sun UltraSPARC IV + and T1), other architectures only put several single cores with their own cache on one chip. Processor-based licensing software companies have developed various concepts to respond to these developments. With multi-core processors, Oracle counts every processor core on a chip with 0.25 (Sun UltraSPARC T1), 0.5 (Intel and AMD CPUs) or 0.75 (HP, IBM and Sun RISC CPUs). Microsoft has announced that it will no longer use the cores, but the chips as the basis for licensing, which means that there is only one license for a multi-core processor. With Windows Server 2016, core-based licensing (per core) still applies.
Multi-core processors can be divided into two variants depending on their internal structure: symmetrical and asymmetrical multi-core processors.
In symmetrical multi-core processors, the individual cores are the same. A program translated for this processor can be executed on any of its cores. This type of multi-core processor is an SMP system . Since multi-core processors are a variant of the SMP, the purpose of a multi-core processor SMP is to be implemented in a space-saving manner. An example of such an 8-way SMP system on a chip is the Sun UltraSPARC-T1 processor.
A modification of this is also ARM's big.LITTLE concept, in which several powerful, energy-hungry cores are combined with a weak, energy-saving core. However, the weak core is binary code compatible with the strong ones and can also execute all programs. Examples of this concept are nVidia Tegra 3 and Samsung Exynos 5 Octa.
In asymmetrical multi-core processors, there are different cores that are controlled differently and understand different machine language . A program can only be executed on a kernel that corresponds to its translation. In this type of multi-core processor, some of the cores work like classic main processors , others like asynchronous coprocessors . An example of such a system is the IBM Cell processor .
Processors with significantly more cores than usual are often referred to as “many-core processors”; the cores are subdivided into several "tiles", each of which has defined, mostly redundant tasks and is its own processing unit with access to shared resources (RAM, cache, I / O units), for example the
- IBM / DARPA / UT-Austin TRIPS : two cores with 16 execution tiles each, four register and data tiles, five instruction tiles, one control and several memory and network tiles
- Intel Terascale : a core with 80 to 100 tiles, some of which specialize in SoC tasks
- Intel Many Integrated Core Architecture (MIC) with over 50 tiles
- Christian Hirsch: Embedded processor with 64 cores. In: heise online , August 21, 2007, accessed on April 27, 2010 (news item).
- Fraunhofer IAO Study: Market Overview of Tools for Multicore Software Development .