Neuromorphic circuit

A neuromorphic circuit is an electronic circuit which is used to map a model of a neuron as hardware in the context of neuromorphing . These models can be combined to form artificial neural networks . Neuromorphic circuits are a special case of neural circuits .

A neuron model manufactured using CMOS technology is referred to as a “silicon neuron ” ( SiN). A special case here is the neuristor , which implements a simple neuron model including synapses in a single component.

Modules

Neuromorphic circuits are combined from modules to form more complex circuits. These modules simulate the following properties:

Line dynamics , including integrating behavior and gating variables . The generation of action potentials (even nerve impulse or spike known), refractory mechanisms, the adjustment of the spike frequency (also firing frequency) and the spike threshold adjustment.

Line dynamics

Integrators

• 

  Tau cell

• 

  First order low pass filter ; Operation below the threshold voltage

• 

  Difference integrator

Integrators are used to simulate the integrating line dynamics of a neuron. These circuits map a first order differential equation. This becomes the shape

${\displaystyle G_{\mathrm {syn} }'=\tau _{RC}\,{\frac {\mathrm {d} G_{\mathrm {syn} }}{\mathrm {d} t}}=\tau _{RC}\,{\dot {G}}_{\mathrm {syn} }=G_{\mathrm {in} }-G_{\mathrm {syn} }}$

shown in order to be able to solve them with an integrator. Here is

${\displaystyle G_{\mathrm {in} }}$	... an input variable
${\displaystyle G_{\mathrm {syn} }}$	... an output variable
${\displaystyle t}$	... the time
${\displaystyle \tau _{RC}}$	... the membrane time constant
${\displaystyle \tau _{Ref}}$	... the refractory period

wherein a variable in the electronic circuit is represented by a voltage or a current . The sub-circuits map logarithmic functions as well as addition and subtraction of the quantities.

As a rule, current-driven circuits are used here, which are operated below the transistor threshold voltage .

Gating variables

The gating variables describe the charge transport in an electric field of an ion channel . This corresponds directly to the conduction characteristics of transistors , which is why a gating variable is mapped by a simple transistor.

Alternatively, memristors can also be used. These are more complex to manufacture, but also significantly more compact than a complete transistor. Memristors are not used in current analog neuromorphic CMOS circuits.

Phenomenological modeling

One way of mapping the line dynamics is to create a circuit that maps the FitzHugh-Nagumo model . These are voltage-driven filters such as switched capacitor filters , which are operated above the transistor threshold voltage.

Modules in silicon neurons

Partial circuits for silicon neurons are named after their function in the biological model.

Synapses

• Linear or non-linear integration of the input spikes.
• Mapping of time-dependent properties such as short-term or long-term plasticity
• Conversion of tension spikes into
  • causing (reinforcing) currents (English: excitatory post-synaptic current , EPSC), or
  • Inhibitory (weakening) currents (English: inhibitory post-synaptic current , IPSC)

Soma (cell body)

• Linear or non-linear integration over time
• Spike generator
• Refractory period
• Spike frequency or threshold adjustment

Dendrites and axons

are described by line theory and, if necessary, mapped using equivalent conductor circuits .

Paradigms

With neuromorphic circuits, a distinction is made between different circuit design paradigms:

Comparison of neuromorphic circuit design paradigms

Presentation of values	analogous	digital
Output signal	simple threshold ( artificial neural network )	Spikes ( spiking neural network )
inversion	weak inversion ( MOSFET in sub-threshold operation )	strong inversion (MOSFET in above-threshold operation)
driver	Voltage driven	Electrically powered
Clock signal	Not clocked	Clocked
Realism / level of detail	Biophysical model	Phenomenological model
speed	Real time	Accelerated (faster than real time)

use

Concrete realizations of neuromorphic circuits represent, for example, Hopfield networks for pattern recognition or multilayer perceptrons ( MLP ) for pattern classification . Modern neuromorphic circuits support reinforcement learning with the help of Hebb's learning rule . In addition, some circuits also master so-called temporal difference learning through a fire-frequency -dependent adaptation ( Spike-Rate-Dependent-Plasticity , SRDP for short) or a pulse duration -dependent adaptation ( Spike-Timing-Dependent-Plasticity , STDP for short).

Individual evidence

1. ↑ Silicon neurons. In: Scholarpedia . Retrieved January 14, 2014 .  
2. ↑ ^{a b c d e} Giacomo Indiveri, Bernabé Linares-Barranco, Tara Julia Hamilton, André van Schaik, Ralph Etienne-Cummings, Tobi Delbruck, Shih-Chii Liu, Piotr Dudek, Philipp Häfliger, Sylvie Renaud, Johannes Schemmel, Gert Cauwenberghs, John Arthur, Kai Hynna, Fopefolu Folowosele, Sylvain Saighi, Teresa Serrano-Gotarredona, Jayawan Wijekoon, Yingxue Wang, Kwabena Boahen: Neuromorphic silicon neuron circuits. In: Frontiers in Neuroscience. March 31, 2011, accessed on January 13, 2014 (English, explanation of basic neuromorphic circuits for emulating neurons).  
3. ↑ Nick Diederich, Thorsten Bartsch, Hermann Kohlstedt, and Martin Ziegler: A memristive plasticity model of voltage-based STDP suitable for recurrent bidirectional neural networks in the hippocampus. In: Scientific Reports volume. June 19, 2018, accessed on July 10, 2020 (English, Neuromorphic implementation of the hippocampal circuit in Hopfield architecture).  
4. ↑ G. Rachmuth, HZ Shouval, MF Bear, CS Poon: A biophysically-based neuromorphic model of spike rate and timing-dependent plasticity. In: Proceedings of the National Academy of Sciences . Volume 108, number 49, December 2011, pp. E1266 – E1274, doi: 10.1073 / pnas.1106161108 , PMID 22089232 , PMC 3241759 (free full text).
5. ↑ Tom Simonite: Thinking in Silicon. MIT Technology Review , December 13, 2013, accessed January 12, 2014 .