PowerPC G5

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PPC-970fx.jpg
A PowerPC-970FX processor
Production: 2003 to 2007
Producer: IBM
Processor clock: 1.0 GHz to 2.5 GHz
Elastic bus cycle: 1: 3 to 1: 2 (bus multiplier)
L2 cache size: 512 KiB to 1024 KiB
Instruction set : PowerPC 2.01: Big-Endian , 64-bit , 32-bit compatible; VMX
Microarchitecture : PowerPC 970
Base: CBGA
Names of the processor cores:
  • PowerPC 970 " GigaProcessor UltraLite "
  • PowerPC 970FX " Altair "
  • PowerPC 970MP "Antares"
  • PowerPC 970GX "Antares SP"

The PowerPC 970 or PPC 970 is a 2002 by IBM imagined 64bit - RISC - microprocessor of the PowerPC family, the Apple as PowerPC G5 is called because he for G eneration 5 of PowerPC development is. It was developed from the more powerful IBM POWER4 + , a member of the IBM Power family for high-speed computers , and is the second PowerPC processor with a 64-bit word length. The PowerPC 620 with 64 bits from the 2nd generation (G2), which was previously presented by IBM and Motorola in 1996, was not commercially successful.

Due to speculative execution , the PowerPC 970 is affected by the Specter and Meltdown vulnerabilities discovered in 2017 . Since systems that use this processor have long been no longer supported by the manufacturer , these security gaps remain open. A patch with Specter would have to consist of a combination of firmware and operating system fix ( microcode update and updated kernel ), whereas with Meltdown a kernel update that implements Page Table Isolation (PTI) would be sufficient .

technology

Thanks to the AltiVec compatible extension VMX the PowerPC 970 is fully code-compatible with 32-bit - G4 processors . The only exception is the optional little-endian support according to the PowerPC specification , which the PowerPC 970 lacks compared to its predecessors. Communication with the system takes place via two 32-bit wide buses . It is equipped with a 64 KB L1 cache for instructions or 32 KB for data and 512 to 1024 KB fault-tolerant ( error correction method ) L2 cache for instructions and data. Models with an internal clock frequency of 1.0 to 2.5 GHz were built, the PowerPC 970FX was overclocked to 2.7 GHz by Apple.

The G5 processor is multi-processor capable and has two floating point units with double precision , which master the FMAC instructions (Fused Multiply Add) , which are particularly important for number crunching ( high-performance computing with many similar numbers and arithmetic operations), in which the processor can process with only one instruction performs a multiplication and addition. Its AltiVec implementation corresponds to that of the first G4 (PowerPC 7400/7410), while G4e versions (from the PowerPC 7450 generation) have an improved AltiVec implementation.

In contrast to the G4 (PowerPC 7400 and 7450 series) designed by Motorola in 1999 , which was developed from the G3 (PowerPC 750 series) developed jointly by IBM and Motorola , the G5 has a much larger lookahead Buffer with which it can anticipate incoming instructions and react accordingly (for example, to request data from the memory that is required later in advance). However, this also means that together with its higher clock rate, the pipeline (the number of stations that an instruction passes through in the processor) is significantly longer than that of the G4. The G5 processes commands in groups of five, which are passed through the chip together, since otherwise the administrative effort would be too great with a maximum of 215 instructions being processed at the same time. The G5 tries to fill these groups of five, which always consist of four arithmetic commands and a jump command, as optimally as possible at the beginning of processing; unused slots remain free. Adapted compilers can help to fill the groups of five better by generating the appropriate code .

In Apple's G5 models, the processor is connected to the system controller via the elastic bus , a bidirectional, 32-bit front side bus (FSB) in each direction . The FSB in the Power Macs and Xserve G5 normally runs at half the respective processor speed. Only with the iMac G5 and the single 1.8 GHz Power Mac G5 Late 2004 (which internally corresponds to the iMac G5 Rev. A and therefore differs from all other Power Mac G5 models) does the Elastic Bus clock with one Third of the CPU speed, but other multipliers are also possible according to IBM.

As a chipset, Apple used the CPC925 chip developed jointly with IBM (called U3 and U3H by Apple), which manages the connection with PCI and AGP expansion cards and with its memory controller , DDR 400 memory, optionally also with ECC , can be connected. In the last Power Mac G5 models with dual-core processor PowerPC 970MP, as in the last iMac G5 models, the newer chipset CPC945 (called by Apple U4), developed by IBM alone, is used, which means that these models are not only PCI- Express introduced on Macs, but also accelerated the memory used to DDR2-533 (again optionally with ECC). This also improves the memory latency, which, in addition to the integer performance, was the main criticism of the first G5 generation.

The last CPC965 chipset presented in 2006 primarily offers power consumption optimization.

use

IBM used the PowerPC 970 in its own JS20 (970 / 970FX) and JS21 (970MP / 970FX) blades that some TOP500 clusters such as MareNostrum in Spain used. The IBM System p5 185 Express , available until 2007, also used G5 processors. Other manufacturers also offered G5 blades, and the PPC manufacturer Genesi also offered an open server workstation based on the dual-core G5 PowerPC 970MP from 2006 onwards.

Interior of a Rev. A G5 iMac , with 970FX processor "G5"

Since the PowerPC 970 still comes from the AIM alliance (Apple, IBM, Motorola), Apple was also the main customer and put the "G5", which is also the colloquial name for the Macs operated with it, in the Power Mac G5 and in the iMacs were selling at the same time . In order to keep the noise development of the Power Mac G5 at a low level, Apple used the top model at the time with 2 × 2.5 GHz CPUs (and in the two subsequent revisions with 2 × 2.7 GHz CPU and 2 × 2 , 5 GHz dual core CPU each in the top model) a liquid cooling system is used; With a total of nine individually controlled fans, the device is pleasantly quiet. A Power Mac G5 with a 3 GHz should appear according to Steve Jobs in 2004, but that never happened. To what extent this promise was no longer implemented in consultation with IBM remained unclear, but in early 2006 Apple switched from PowerPC to Intel processors.

Model data

IBM PowerPC 970

  • Development name: “ GigaProcessor UltraLite ” (GP-UL); “ GigaProcessor ” was the development name of the IBM POWER4.
  • L1 cache : 64  KiB (instructions) + 32  KiB (data)
  • L2 cache: ECC 512 KiB with processor clock
  • 64-bit, fully 32-bit compatible, only big-endian , VMX
  • 575-pin CBGA
  • FSB : GDR
  • Operating voltage ( VCore ): 1.1-1.3 volts
  • Power loss ( TDP ): typically 42 watts at 1.8 GHz (1.3 volts)
  • Release DATE: 2003
  • Manufacturing technology: 130 nm
  • The size: 121 mm² with 55 million transistors
  • Processor Version Register (PVR): 0x00390202
  • Clock rates: 1.4-1.8 GHz; Apple models: 1.6–2.0 GHz
  • Standard models:
    • PowerPC 970 1.4 GHz *
    • PowerPC 970 1.6 GHz *
    • PowerPC 970 1.8 GHz (TDP: 42 W) *

* Models of the PowerPC 970 sold by IBM

IBM PowerPC 970FX

  • Development name: " Altair "
  • L1 cache : 64  KiB (instructions) + 32  KiB (data)
  • L2 cache: ECC 512 KiB with processor clock
  • 64-bit, fully 32-bit compatible, only Big-Endian , VMX , PowerTune
  • 575-pin CBGA
  • FSB : DDR with half ( Processor Interface Ratio 2: 1) or a third (3: 1) of the processor clock
  • Operating voltage ( VCore ): 1.0-1.25 volts
  • Power loss ( TDP ): maximum 13–76 watts (at 105 ° C), typically 10–61 watts (at 65 ° C)
  • Release DATE: 2004
  • Manufacturing technology: 90 nm
  • The size: 66.2 mm² with 58 million transistors
  • Processor Version Register (PVR): DD1.0: 0x00391100, DD2.0: 0x003c0200, DD2.1: 0x003c0201, DD3.0: 0x003c0300, DD3.1: 0x003c0301
  • IBM Order Part Number : IBM25PPC970FX5xxxxxxx, IBM25PPC970FX6xxxxxxx
  • Clock rates: 1.0-2.2 GHz; Apple models: 1.8-2.7 GHz (overclocked)
  • Standard models (DD3.x):
    • PowerPC 970FX 1.6 GHz (TDP: 29 W maximum, 23 W typical) *
    • PowerPC 970FX 1.8 GHz (TDP: 37 W maximum, 30 W typical) *
    • PowerPC 970FX 2.0 GHz (TDP: 60 W maximum, 48 W typical) *
    • PowerPC 970FX 2.2 GHz (TDP: 76 W maximum, 61 W typical) *
  • " Power-Optimized " models (DD3.x):
    • PowerPC 970FX 1.0 GHz (TDP: 13 W maximum, 10 W typical) *
    • PowerPC 970FX 1.2 GHz (TDP: 16 W maximum, 13 W typical) *
    • PowerPC 970FX 1.4 GHz (TDP: 19 W maximum, 15 W typical) *
    • PowerPC 970FX 1.6 GHz (TDP: 21 W maximum, 17 W typical) *
    • PowerPC 970FX 2.0 GHz (TDP: 50 W maximum, 40 W typical) *
    • PowerPC 970FX 2.2 GHz (TDP: 60 W maximum, 48 W typical) *

* Models of the PowerPC 970FX sold by IBM

IBM PowerPC 970MP

  • Development name: "Antares"
  • Dual-core processor
  • L1 cache : 64  KiB (instructions) + 32  KiB (data)
  • L2 cache: ECC 1024 KiB with processor clock per core
  • 64-bit, fully 32-bit compatible, only Big-Endian , VMX , PowerTune, built-in self-test
  • 575-pin CBGA
  • FSB : DDR with half ( Processor Interface Ratio 2: 1) or a third (3: 1) of the processor clock
  • Operating voltage ( VCore ): 0.95-1.35 volts
  • Power loss ( TDP ): maximum 28–125 watts (at 105 ° C), typically 23–100 watts (at 65 ° C)
  • Release DATE: 2005
  • Manufacturing technology: 90 nm
  • The size: 153.8 mm² with 183 million transistors
  • Processor Version Register (PVR): DD1.0: 0x00440100, DD1.1: 0x00440101
  • IBM Order Part Number : IBM25PPC970MP7xxxxxxx
  • Clock rates: 1.2–2.5 GHz
  • Standard models (DD1.1):
    • PowerPC 970MP 1.2 GHz (TDP: 32 W maximum, 26 W typical) *
    • PowerPC 970MP 1.4 GHz (TDP: 40 W maximum, 32 W typical) *
    • PowerPC 970MP 1.6 GHz (TDP: 45 W maximum, 36 W typical) *
    • PowerPC 970MP 1.8 GHz (TDP: 55 W maximum, 44 W typical) *
    • PowerPC 970MP 2.0 GHz (TDP: 70 W maximum, 56 W typical) *
    • PowerPC 970MP 2.5 GHz (TDP: 125 W maximum, 100 W typical) *
  • “ Power-Optimized ” models (DD1.1):
    • PowerPC 970MP 1.2 GHz (TDP: 28 W maximum, 23 W typical) *
    • PowerPC 970MP 1.4 GHz (TDP: 35 W maximum, 28 W typical) *
    • PowerPC 970MP 1.6 GHz (TDP: 40 W maximum, 32 W typical) *
    • PowerPC 970MP 1.8 GHz (TDP: 50 W maximum, 40 W typical) *
    • PowerPC 970MP 2.0 GHz (TDP: 60 W maximum, 48 W typical) *
    • PowerPC 970MP 2.5 GHz (TDP: 115 W maximum, 92 W typical) *

* Models of the PowerPC 970MP sold by IBM

IBM PowerPC 970GX

  • Development name: “Antares SP”
  • L1 cache : 64  KiB (instructions) + 32  KiB (data)
  • L2 cache: ECC 1024 KiB with processor clock
  • 64-bit, fully 32-bit compatible, only Big-Endian , VMX , PowerTune, built-in self-test
  • 575-pin CBGA
  • FSB : GDR
  • Operating voltage ( VCore ):
  • Power dissipation ( TDP ):
  • Release DATE: 2006
  • Manufacturing technology: 90 nm
  • Processor Version Register (PVR): DD1.0: 0x00450000
  • IBM Order Part Number : IBM25PPC970GX7xxxx-xx
  • Clock rates: 1.2–2.4 GHz
  • “ Performance-Optimized ” models (DD1.0):
    • PowerPC 970GX 1.6 GHz *
    • PowerPC 970GX 1.8 GHz *
    • PowerPC 970GX 2.0 GHz *
    • PowerPC 970GX 2.2 GHz *
    • PowerPC 970GX 2.4 GHz *
  • “ Performance-Optimized ” models (DD1.0):
    • PowerPC 970GX 1.2 GHz *
    • PowerPC 970GX 1.4 GHz *
    • PowerPC 970GX 1.6 GHz *
    • PowerPC 970GX 2.2 GHz *
    • PowerPC 970GX 2.4 GHz *

* Models of the PowerPC 970GX sold by IBM

See also

Web links

Individual evidence

  1. ^ Peter Sandon: IBM PowerPC 970: First in a new family of 64-bit high performance PowerPC processors . Presentation of at the Microprocessor Forum in October 2002 (English)
  2. ↑ Christof Windeck: IBM PowerPC 970: It should do that. In: Heise online . October 15, 2002 . Retrieved October 28, 2014.
  3. ↑ Apple Press Info: Apple and IBM Introduce the PowerPC G5 Processor (English) June 23, 2003; accessed on October 1, 2014.
  4. ↑ a b c d e f g h i informit: Take a Look Inside the G5-Based Dual-Processor Power Mac (English) from October 13, 2006; Amit Singh; Retrieved October 26, 2014.
  5. ↑ Jesse Stein, Peter Sandon: PowerPC 970 - First in a new family of high-performance 64-bit PowerPC microprocessors. (No longer available online.) In: PowerPC processor news. IBM, December 2002, archived from the original on April 10, 2003 ; accessed on November 1, 2014 (English).
  6. ↑ Linux Kernel Driver DataBase: CONFIG_EDAC_CPC925: IBM CPC925 Memory Controller (PPC970FX) (English), accessed on October 25, 2014.
  7. ↑ IBM System p5 185 Express (English), accessed October 28, 2014.
  8. ↑ Blog: Dual 970MP Open Server Workstation
  9. ↑ Andreas Beier, Andreas Stiller: Apple falls from the trunk; Steve Jobs announces the change - "Intel inside" instead of PowerPC. In: Heise online . June 13, 2005 ( c't 13/2005). Retrieved October 26, 2014.
  10. ↑ Sander Olson: MPF 2002: Day 2 morning session: IBM 970, Intel Banias, and Via's Nehemiah Geek.com, October 15, 2002 (English); accessed on November 1, 2014.
  11. ↑ AnandTech: No more mysteries: Apple's G5 versus x86, Mac OS X versus Linux , Johan De Gelas, June 3, 2005; Retrieved October 26, 2014.
  12. ↑ MacBidouille: [Rumeur] ( Memento of the original from November 13, 2014 in the Internet Archive ) Info: The archive link was automatically inserted and not yet checked. Please check the original and archive link according to the instructions and then remove this notice. (French) dated May 5, 2003; Quote: The first benchmarks were done during March 2003 on a preview model running at 1.4 GHz. (English). @1@ 2Template: Webachiv / IABot / www.macbidouille.com
  13. ↑ a b IT Jungle: IBM Launches Dual-Core PowerPC 970MP Chip ( Memento of the original from March 4, 2016 in the Internet Archive ) Info: The archive link was automatically inserted and not yet checked. Please check the original and archive link according to the instructions and then remove this notice. (English), quote: The “Antares” PowerPC 970MP is apparently a true dual-core implementation of the PowerPC, not two “Altair” PowerPC 970FX processors jammed together in a single chip package and sharing a single socket with some SMP electronics tossed in to make them share the CPU bus. @1@ 2Template: Webachiv / IABot / www.itjungle.com
  14. ↑ a b c IBM Eserver BladeCenter JS20 - PowerPC 970 Programming Environment (English), PDF (1.4MB), First Edition (1st edition) from January 2005; Chapter 1, Page 7 or PDF Page 21; Retrieved October 26, 2014.
  15. ↑ macwelt.de: IBM announces Power Save and Dual Core G5 , Daniel Kottmair, July 8, 2005; Retrieved October 26, 2014.
  16. ↑ Christof Windeck: IBM announces the dual-core PowerPC 970MP and PPC-970FX energy-saving versions. In: Heise online . July 8, 2005 . Retrieved October 26, 2014.
  17. ↑ IBM PowerPC 970FX RISC Microprocessor Data Sheet 2.3 (PDF; 3.2 MB) June 4, 2006 (English); accessed on November 1, 2014.
  18. ↑ a b ComputerBase: IBM develops dual-core G5 from July 25, 2004, Thomas Huebner, accessed on July 26, 2015; Quote: Further improvements over the 970FX include optimizations to IBM's power-saving technology PowerTune and a programmable unit for self-diagnosis called ABIST (array built-in self-test).
  19. ↑ a b Redpaper: IBM BladeCenter JS21, Technical Overview and Introduction (English) from March 2006, PDF (1.5M), Trina Bunting and Wayne Kimble, page 37, point 3.1.2 Boot Time Diagnostics (PDF page 47); Retrieved July 26, 2015.
  20. ↑ IBM PowerPC 970MP RISC Microprocessor Datasheet 1.3 ( Memento of the original from October 27, 2014 in the Internet Archive ) Info: The archive link was inserted automatically and has not yet been checked. Please check the original and archive link according to the instructions and then remove this notice. (PDF; 846 kB) January 17, 2008 (English); Retrieved October 26, 2014. @1@ 2Template: Webachiv / IABot / www-01.ibm.com
  21. ↑ IBM PowerPC 970MP RISC Microprocessor Datasheet 1.0 (PDF; 876 kB) July 31, 2006 (English); accessed on November 1, 2014.
  22. ^ The Register: Dual-core IBM PowerPC 'to ship in single-core form' (English), Tony Smith, November 16, 2004; accessed on October 31, 2014.
  23. ↑ News Release: IBM Strengthens Power Architecture With New Low-Power Processors (English) from October 3, 2006; Retrieved October 26, 2014.