Intel P6

P6 architecture

P6 was the internal Intel name for the first x86 processors of the sixth generation. The development of the so-called P6 architecture began in 1991. The main architect was Robert Colwell .

The first processor of the P6 family was the Pentium Pro from 1995. Based on this, Intel developed the Pentium II , Pentium III and Pentium M series as well as the core micro-architecture . The P6 architecture was therefore unusually long-lived. The NetBurst architecture of the Pentium 4 , which had meanwhile been developed as a replacement, was abandoned by Intel in favor of the P6.

The architecture of the P6 is designed with its relatively short pipeline to more moderate clock rates and achieved their performance mainly due to a high number of instructions per clock cycle ( instructions per cycle, short IPC). Nevertheless, the clock rate of the P6 has been increased from the original 150 MHz for the Pentium Pro to 1400 MHz for the Pentium III-S .

With the P6, some techniques were first used with x86 processors:

• superscalar superpipelined architecture ,
• L2 cache fully integrated into the CPU design , partly on-die, partly as external chips,
• wide 36-bit address memory that allows more than 4 GB of physical memory,
• Speculative execution and out-of-order execution to increase execution speed and
• Renaming of registers for more efficient processing of commands in the pipeline.

Members of the P6 family

• Pentium Pro
• Pentium II
• Pentium III
• Pentium M
• Some Celeron models
• Some Xeon models

See also

• List of Intel microprocessors
• AMD64 architecture
• QuantiSpeed architecture

literature

• Robert Colwell : The Pentium chronicles. The people, passion, and politics behind Intel's landmark chips. Wiley, Hoboken, NJ 2006, ISBN 0-471-73617-1 .