Larrabee (GPU)

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Block diagram of the Larrabee GPU architecture.

Larrabee is the code name for a generation of graphics cards from Intel . The coprocessor based on it appeared in 2012 under the name Intel Xeon Phi .

Larrabee was originally scheduled to hit the market in late 2009 or early 2010. In December 2009, Intel confirmed that no products based on the first generation of the Larrabee will be launched. In the summer of 2012, Intel presented the MIC card (Many Integrated Core) as a coprocessor under the name "Intel Xeon Phi" based on the further developed Larrabee architecture.

The first processors of the second generation (code name "Knights Corner") appeared in the form of two PCI-Express plug-in cards with the names "Xeon Phi 5110P" and "Xeon Phi 3100".

Larrabee

In January 2007, Intel officially confirmed the existence of the Larrabee project for the first time. However, at this point in time it was not announced what it was. It was only at the Intel Developer Forum in April 2007 that the then Senior Vice President and General Manager of Intel, Patrick Gelsinger, announced that the Larrabee was a high-end graphics card based on "IA ++" cores. Gelsinger indicated scientific computing, visualizations or other applications in the field of health and analysis as areas of application.

In December 2009, Intel announced that initially no Larrabee graphics cards would be brought onto the consumer market. The reasons given by Intel were that Larrabee had not met expectations in both software and hardware. At the same time, it was stated that a mature 32-nm manufacturing process was necessary for competitive Larrabe products, which indicates that the power consumption must have been too high and / and the clock rates were too low. In November 2009, Intel presented an overclocked Larrabee with a performance of over one Tera FLOPS at the supercomputing trade fair . However, these performance ranges were already achieved by the Radeon HD 4870 or Geforce GTX 280 in summer 2008 . Intel confirmed that Larrabee will be continued as a pure research project to support the software development of the "Larrabee 2".

Xeon Phi

Knights Ferry prototype

As a prototype, Intel uses a Pentium P54C-based processor core, which is "shrunk" to 45 nm lithography, is equipped with 64-bit extensions and AVX- 512 extensions, and is building a cluster of many such cores with a common Cache management on a chip (MIC = “Many Integrated Core” concept). The chip never comes on the market, as it is probably not competitive as a graphics processor with the highly developed competing products from ATI, AMD and Nvidia.

Knights Corner x100 co-processor family

Although the MIC concept has not proven itself as a graphics processor, it does represent a sensible approach to “high performance computing”, as the parallel computer concept has long since established itself in the field of supercomputers . The battle for computing efficiency has broken out here, so Intel needed a processor core that is not optimized for single-task performance, but for low energy consumption. The 22 nm lithography that was current at the time was used for this generation; the MIC concept remained essentially unchanged. In 2012, several PCI compute accelerator cards appeared that were incorporated into some supercomputers. Despite all efforts, this product generation did not become a commercial success compared to the competitor Nvidia with the Tesla cards that had long been established in parallel computing .

Product name Cache Clock frequency Number Cores Publication date TDP
Intel® Xeon Phi ™ Coprocessor 3120A 6GB 1,100 GHz 57 core Q2'13 300 W
Intel® Xeon Phi ™ Coprocessor 3120P 6GB 1,100 GHz 57 core Q2'13 300 W
Intel® Xeon Phi ™ Coprocessor 5120D 8GB 1,053 GHz 60 core Q2'13 245 W
Intel® Xeon Phi ™ Coprocessor 5110P 8GB 1,053 GHz 60 core Q4'12 225 W
Intel® Xeon Phi ™ Coprocessor 7120A 16 GB 1,238 GHz 61 core Q2'14 300 W
Intel® Xeon Phi ™ Coprocessor 7120D 16 GB 1,238 GHz 61 core Q1'14 270 W
Intel® Xeon Phi ™ Coprocessor 7120P 16 GB 1,238 GHz 61 core Q2'13 300 W
Intel® Xeon Phi ™ Coprocessor 7120X 16 GB 1,238 GHz 61 core Q2'13 300 W

Knights Landing x200 family

This generation is based on a processor core from the Intel Atom series, the Airmont, formerly Silvermont, which has been shrunk to 14 nm lithography. It contains the vector commands AVX -512, a package of SIMD commands that already enables the parallelization of 8 double-precision numbers at command level. Since the atom cores are fundamentally developed for low energy consumption (they are supposed to be used in mobile devices), they are well suited for the MIC concept and are already available.

Basically two variants are to be sold here:

  1. a PCI-E compute accelerator card
  2. a number of processor variants that behave exactly like an x86-64 processor

The new processor has a socket 3647 called LGA-3647 , which will also be used in the upcoming Intel Xeon (Skylake) scalable processors. This socket enables a total of six DDR-4 main memory channels to be controlled. In addition, there will be Knights Landing variants with the new Intel Omni-Path connection or cluster technology, an Intel competitor product from InfiniBand .

In order to supply a processor cluster with up to 72 cores with sufficient data so that the computing power of all cores can also be used, high bandwidths are required for the main memory. Knights Landing therefore has various optimizations and cache memories:

  • Division of the up to 72 cores in "tiles" (tiles) of two cores each with 1 Mbyte shared 2nd level cache memory
  • all tiles are connected to the main memory channels via a "ring" or "mesh" network (source unclear here) with a total bandwidth of 700 GB / sec
  • Knights Landing has 6 DDR4-2400 RAM channels with a total of 115.2 GB / sec bandwidth for up to 384 GB of RAM
  • In addition to the 6 DDR4 RAM channels, there are also 16 GB of MCDRAM ("Multi Channel DRAM", a form of HBM or " High Bandwidth Memory "), divided into 8 ICs and connected with a total of 450 GB / sec bandwidth. The MCDRAM can be configured either as a cache for the DDR4 memory or as an additional memory.
Product name Cache Clock frequency Number Cores Publication date TDP
Intel® Xeon Phi ™ Processor 7210 16 GB 1.30 GHz 64 core Q2'16 215 W
Intel® Xeon Phi ™ Processor 7230 16 GB 1.30 GHz 64 core Q2'16 215 W
Intel® Xeon Phi ™ Processor 7250 16 GB 1.40 GHz 68 core Q2'16 215 W
Intel® Xeon Phi ™ Processor 7210F 16 GB 1.30 GHz 64 core Q4'16 230 W
Intel® Xeon Phi ™ Processor 7230F 16 GB 1.30 GHz 64 core Q4'16 230 W
Intel® Xeon Phi ™ Processor 7250F 16 GB 1.40 GHz 68 core Q4'16 230 W
Intel® Xeon Phi ™ Processor 7290 16 GB 1.50 GHz 72 core Q3'16 245 W
Intel® Xeon Phi ™ Processor 7290F 16 GB 1.50 GHz 72 core Q4'16 260 W

Knights Mill 72x5 family

In the fourth quarter of 2017, the family was expanded with three more processors. New AVX-512 instructions are introduced for deep learning algorithms , which enable integer operations with 8 and 16-bit width and are intended to increase performance by a factor of 2 or 4

Product name Cache Clock frequency Number Cores Publication date TDP
Intel® Xeon Phi ™ Processor 7235 16 GB 1.30 GHz 64 core Q4'17 250 W
Intel® Xeon Phi ™ Processor 7285 68 core
Intel® Xeon Phi ™ Processor 7295 1.50 GHz 72 core 320 W

There will be no more product generations (announced under the code name Knights Hill ), Intel is canceling the entire Xeon Phi series.

Differentiation from Intel graphics processors

Intel's GPUs that have been available for some time and that were integrated in the chipset ( Intel GMA ) have been further developed into GPUs that are integrated into the CPU itself and now run under the trade name "Iris" or Intel HD Graphics . Starting with the Intel Sandy Bridge microarchitecture in the Intel Core i series, there are variants with or without an integrated GPU.

Individual evidence

  1. ↑ a b c ComputerBase: Larrabee as a consumer graphics card is history , news from December 5, 2009
  2. ↑ AnandTech: Intel Announces Xeon Phi Family of Co-Processors - MIC Goes Retail , news from June 19, 2012
  3. ↑ ComputerBase: Intel: Own discrete graphics chips are coming , news from January 23, 2007
  4. ↑ ComputerBase: IDF: Polaris 2 with IA and Larrabee with IA ++ , message from April 20, 2007
  5. ↑ Intel Developer Zone: Intel: Xeon Phi 7200 Memory Management Optimizations , documentation from December 22, 2016
  6. ↑ https://www.heise.de/newsticker/meldung/Xeon-Phi-ist-tot-es-lebe-der-Xeon-H-3891026.html

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