Clock generator (computer)
The clock generator ( English clock generator ) in computers is the operating frequency of processors and clock-dependent peripherals before, as far as these on the motherboard is and is not dependent on external events or synchronization. This includes RAM and bus systems such as u. a. PCIe , PCI , USB and earlier ISA as well as the most common on-board graphics cards, UARTs and on-board audio codecs.
The real-time clock is connected to a separate 32.768 kHz crystal. It is not connected to the clock generator, which is switched off in standby mode .
The Intel 8088 was clocked with the tailor-made Intel 8284 , the Intel 80286 with the matching Intel 82284 . These chips have already been licensed to other semiconductor manufacturers for replication .
function
A simple oscillator in a Pierce circuit consisting of a quartz crystal and two non-gates (inverters) or NAND gates with interconnected inputs of a TTL IC was originally used in home computers . The first gate worked as a vibration amplifier in the oscillator, the second as a signal amplifier and line driver . The basic circuit is the same today. Today, however, a special circuit is used to generate different clocks for processor, memory and peripherals using a PLL synthesizer from a single 14.318 MHz oscillator. If clocks are dependent on one another, they are generated in the correct phase. This saves additional quartz crystals.
Programmability
If processors of different speeds are specified for the motherboard, the clock generator must be programmable. While at 386, 486, and Pentium the bus clock via jumpers or DIP switches have been programmed into the clock generator, and later came BIOSes with an adjustable in the BIOS setup configuration of the clock generator.
With some mainboards for overclockers , the clock can be tuned through the range up to a step size of 1 MHz, like with a receiver. This requires a prepared clock generator as well as appropriate interfaces such as general purpose pins (programmable I / O for free, application-specific determination) or a synchronous, serial interface in the chipset.
From Pentium 2 onwards , depending on the type , dedicated pins of the processor are switched or left open and passed from the processor slot to the clock generator. With this, the processor programs the clock generator to its requirements through its presence. Processors from this generation onwards also program the down converter on the motherboard to their specific supply voltage by intervening in the converter’s reference voltage .
begin
After the operating voltage has built up, the Pierce circuit settles. After a few cycles, it delivers a frequency-stable signal. With the PG signal of the PC power supply unit , (Power good), which means that the output voltages of the power supply unit are stable after switching on, the oscillator is considered to have settled. Alternatively, in the case of small computers, the PG signal is replaced by an RC element connected to the supply voltage .
Quiet
Individual clocks can be switched off when the computer is idle. If the computer is in sleep mode , the RAM has not been copied to the hard drive. Since it is DRAM , it has to be constantly refreshed to keep its data. Therefore, the RAM clock is activated and deactivated separately. Processors behave statically; they can be stopped by switching off the clock without losing the contents of their registers .
Clock switching
From the 286 to the Pentium 1, turbo switches were sometimes attached to the housing. These switched a 2.5-digit 7-segment display between two preset values and the turbo signal on the motherboard between ground and open. The turbo signal switched a further counter stage of the synthesizer on or off. By switching on the counter stage, the cycle was halved. Today the pace is reduced as needed. The cycle is reduced when the system is not being used. Newer processors from Intel have a patented overheating protection. They switch off the clock when overheating or ignore individual cycles if the temperature limit is reached.
The minimum length of the clock cycle is decisive for the stability of the system. It must never be shortened, otherwise the gates have not switched completely and serious malfunctions will result. It is therefore technically advisable to stop the processor at the active RESET signal during the settling phase. This is an internal signal and is only indirectly related to the reset button.
Electromagnetic compatibility
Impedance matching and low pass filter
Although the processing speed of the computers is constantly increasing, the EMC emissions remain largely the same. The measurable emissions are mainly caused by wired radiation from conductor tracks on the motherboard and their coupling to other conductors. To avoid this radiation, the ends of the signal lines are terminated with a load . In order to adapt the output of the clock generator to the respective application, the signal is passed through a resistor connected in series. However, this also causes a propagation delay of the signal. This can be desired. In order to avoid higher-frequency interference ( harmonics ), an RC element at the output is adapted to run time and impedance . The additional components result in costs that are often saved by omitting the capacitors . This makes it more difficult for the PC manufacturer to comply with the EMC limit values according to EN55022 . Clock generators were mostly manufactured on older semiconductor production systems because of the costs, which resulted in increased cross currents when switching the gates.
Frequency spreading
Another method of limiting interference is to spectrally distribute the energy of the interference radiation. In the frequency spread ( english spectrum spread ) working with frequency modulation. This is done in the programming of the frequency divider of the synthesizer. Some clock generators allow a frequency spread of 0.25 MHz or 0.5 MHz as well as exclusive downward modulation. This is set in the BIOS setup. The downward modulation has the consequence that the computer is underclocked insignificantly, but is not operated above the specified frequency at any time, and that the specified gate delay times of the circuit to be clocked are not exceeded. With some clock generators, in practice the errors of the frequency dividers in the synthesizer are greater than the upward spreading. They result from the cost-effective approximation of the frequency to be generated and are therefore the smallest common multiple of the dividers and counters in the synthesizer. The difference is around 1 to 66.
Circuit board layout
In order to keep the emissions of the clock generator low, the operating voltage is a LC - low-pass filter decoupled. In addition, the ground potential is separated from the rest of the motherboard except for one point so that the emissions are not fed into the operating voltages via the line resistance. Alternatively, the clock generator is located on an island, isolated over a ground layer on the motherboard. It is thus partially shielded and decoupled from the rest of the circuit. Clock generators have several pins for ground and operating voltage. This can be used to filter the operating voltage separately.