Socket 1156
| Socket 1156 | |
|---|---|
|
|
| Specifications | |
| introduction | September 2009 |
| design type | LGA |
| contacts | 1156 |
| Bus protocol | Direct Media Interface (DMI) |
| Processors | Intel Core i3 , Core i5 , Core i7 , Xeon |
The Socket 1156 (also known as LGA1156 socket or H) is a processor socket for the processor series Nehalem microarchitecture Intel Core i3 , Core i5 and Core i7 . Its incompatible successor is socket 1155 .
The transition from the core to the Nehalem microarchitecture required a new socket. In the case of processors for socket 1156, the memory controller and the PCIe controller are integrated in the processor. The socket must accordingly provide additional connections for the memory bus and PCIe lanes. The integration of the PCIe controller provided for broadband data transfer on the CPU chip eliminates the need for a northbridge for this task. For this reason, only a slightly modified Southbridge is connected to the CPU , which Intel calls the Platform Controller Hub (PCH). As usual with Intel's Southbridges, the PCH is connected with a Direct Media Interface (DMI).
Individual evidence
- ↑ VR-Zone: Intel Replaces 45 nm Havendale w / 32 nm Clarkdale , message dated February 10, 2009, accessed on April 12, 2009
- ↑ Intel: Intel 5 Series Chipset and Intel 3400 Series Chipset , data sheet