OpenCores: Difference between revisions
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{{Short description|Open-source hardware community}} |
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[[File:OpenCores logo.png|thumb|right]] |
[[File:OpenCores logo.png|thumb|right]] |
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'''OpenCores''' is a community developing [[Digital data|digital]] [[open-source hardware]] through [[electronic design automation]], with a similar ethos |
'''OpenCores''' is a community developing [[Digital data|digital]] [[open-source hardware]] through [[electronic design automation]] (EDA), with a similar ethos to the [[free software movement]]. OpenCores hopes to eliminate redundant design work and significantly reduce development costs. A number of companies have been reported as adopting OpenCores IP in chips,<ref name="flextronics">Andrew Orlowski, "Flextronics demos open source chips", ''The Register'', 12 December 2003, [https://www.theregister.co.uk/2003/12/12/flextronics_demos_open_source_chips/]</ref><ref>Rick Merritt, "Vivace plans to release HD media processors", ''EE Times India'' (online edition), 20 April 2006 [http://www.eetindia.co.in/ART_8800415135_1800010_NT_22ab7fe0.HTM] {{Webarchive|url=https://web.archive.org/web/20150107075217/http://www.eetindia.co.in/ART_8800415135_1800010_NT_22ab7fe0.HTM|date=7 January 2015}}</ref> or as adjuncts to EDA tools.<ref>Dylan McGrath, "Firm packages OpenCores IP with EDA tool", ''EE Times'' (online edition), 9 January 2006 [http://www.eetimes.com/showArticle.jhtml?articleID=192501283]</ref><ref>"OVP Simulator Smashes SystemC TLM-2.0 Performance Barrier", ''EDA Cafe'', 5 February 2009 [http://www10.EDACafe.com/nbc/articles/view_article.php?section=CorpNews&articleid=650050]</ref> OpenCores is also sometimes cited as an example of open source in the electronics hardware community.<ref>Richard Goering, "Doors 'open' to hardware", ''EE Times'' (online edition), 6 June 2005 [http://www.eetimes.com/showArticle.jhtml?articleID=163702854]</ref> |
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OpenCores has always been a commercially owned organization. In 2015, |
OpenCores has always been a commercially owned organization. In 2015, its core active users established the independent [[Free and Open Source Silicon Foundation]] (FOSSi Foundation), and created another directory on the librecores.org<ref>[https://www.librecores.org librecores.org]</ref> website as the basis for all future development, independent of commercial control. It has been shut down to redirect to a post on the FOSSi Foundation website seven years later in favor of a simple web search, reasoning that "free and open source silicon is no longer a dream".<ref>Philipp Wagner, "Mission accomplished! LibreCores is closing down", 19 October 2022 [https://www.fossi-foundation.org/2022/10/19/librecores]</ref> |
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==History == |
==History == |
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Damjan Lampret, one of the founders of OpenCores, stated on his website that it began in 1999.<ref>http://www.lampret.com/</ref> The |
Damjan Lampret, one of the founders of OpenCores, stated on his website that it began in 1999.<ref>{{cite web |url=http://www.lampret.com/ |title=Home |website=lampret.com}}</ref> The new website and its objectives were reported publicly by ''[[EE Times]]'' in 2000<ref>Peter Clarke, "Free 32-bit processor core hits the Net", [[EE Times]], 28 February 2000 [https://www.eetimes.com/document.asp?doc_id=1214097]</ref> and [[CNET]] News in 2001.<ref>John G Spooner, "Open-source credo moves to chip design", ''CNET News'', 27 March 2001 [http://news.cnet.com/2100-1001-254816.html]</ref> Through the following years it was supported by advertising and sponsorship, including by [[Flex (company)|Flextronics]].<ref name="flextronics"/> |
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In mid-2007 an appeal was put out for a new backer |
In mid-2007 an appeal was put out for a new backer.<ref>Peter Clarke, "OpenCores website, brand up for sale", ''EE Times Europe'' (online edition), 25 June 2007 [http://eetimes.eu/showArticle.jhtml?articleID=204300278]</ref> That November, Swedish design house ORSoC AB<ref>[http://www.orsoc.se ORSoC AB]</ref> agreed to take over maintenance of the OpenCores website.<ref>Peter Clarke, "Swedish design house agrees to maintain OpenCores", ''EE Times Europe'' (online edition), 28 November 2007 [http://eetimes.eu/showArticle.jhtml?articleID=204300278]</ref> |
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''EE Times'' reported in late 2008 that OpenCores had passed the 20,000 subscriber mark.<ref>Anne-Francoise Pele, "OpenCores records 20,000 users", ''EE Times Europe'' (online edition), 28 October 2008 [https://www.eetimes.com/document.asp?doc_id=1252362]</ref> In October 2010 it reached 95,000 registered users and had approximately 800 projects. In July 2012 it reached 150,000 registered users. |
''EE Times'' reported in late 2008 that OpenCores had passed the 20,000 subscriber mark.<ref>Anne-Francoise Pele, "OpenCores records 20,000 users", ''EE Times Europe'' (online edition), 28 October 2008 [https://www.eetimes.com/document.asp?doc_id=1252362]</ref> In October 2010 it reached 95,000 registered users and had approximately 800 projects. In July 2012 it reached 150,000 registered users. |
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During 2015, ORSoC AB formed a joint venture with KNCMiner AB to develop bitcoin mining machines. As this became the primary focus of the business, they were able to spend less time with the opencores.org project. In response to the growing lack of commitment, the core [[OpenRISC]] development team set up the [[Free and Open Source Silicon Foundation]] (FOSSi), and registered the |
During 2015, ORSoC AB formed a joint venture with KNCMiner AB to develop [[bitcoin]] mining machines. As this became the primary focus of the business, they were able to spend less time with the opencores.org project. In response to the growing lack of commitment, the core [[OpenRISC]] development team set up the [[Free and Open Source Silicon Foundation]] (FOSSi), and registered the [https://www.librecores.org librecores.org] website as the basis for all future development, independent of commercial control.<ref>Announcement of FOSSi at ORConf2015, CERN, Genva. [http://openrisc.io/orconf/schedule.html schedule] {{Webarchive|url=https://web.archive.org/web/20160408145633/http://openrisc.io/orconf/schedule.html |date=8 April 2016 }} and [https://www.youtube.com/watch?v=GbLNTo_J0j0&list=PLUg3wIOWD8yoX2ECfeU_QP5snbu2Zs1Wp&index=12 video]</ref> |
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==Licensing== |
==Licensing== |
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The emphasis is on digital modules called "cores", commonly known as [[Semiconductor intellectual property core|IP Core]]s. The components are used for creating both custom [[integrated circuit]]s ([[Application-specific integrated circuit|ASICs]]) and [[Field-programmable gate array|FPGAs]]. |
The emphasis is on digital modules called "cores", commonly known as [[Semiconductor intellectual property core|IP Core]]s. The components are used for creating both custom [[integrated circuit]]s ([[Application-specific integrated circuit|ASICs]]) and [[Field-programmable gate array|FPGAs]]. |
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The cores are implemented in the [[hardware description language]]s [[Verilog]], [[VHDL]] or [[SystemC]] which may be synthesized to either silicon or [[gate array]]s. |
The cores are implemented in the [[hardware description language]]s [[Verilog]], [[VHDL]] or [[SystemC]], which may be synthesized to either silicon or [[gate array]]s. |
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The project aims at using a common non-proprietary [[ |
The project aims at using a common non-proprietary [[Bus (computing)|system bus]] named [[Wishbone (computer bus)|Wishbone]], and most components are nowadays adapted to this bus. |
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Among the components created by OpenCores contributors are: |
Among the components created by OpenCores contributors are: |
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* [[OpenRISC]] – a highly configurable [[RISC]] central processing unit |
* [[OpenRISC]] – a highly configurable [[Reduced instruction set computer|RISC]] central processing unit |
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* [[Amber (processor core)]] – an [[ARM architecture|ARM]]-compatible |
* [[Amber (processor)|Amber (processor core)]] – an [[ARM architecture family|ARM]]-compatible RISC central processing unit |
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* A [[Zilog Z80]] clone |
* A [[Zilog Z80]] clone |
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* [[ |
* [[USB|USB 2.0]] controller |
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* Tri [[Ethernet]] controller, 10/100/1000 Mbit |
* Tri [[Ethernet]] controller, 10/100/1000 Mbit |
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* [[Encryption]] units, for example [[Data Encryption Standard|DES]], [[Advanced Encryption Standard|AES]] and [[RSA ( |
* [[Encryption]] units, for example [[Data Encryption Standard|DES]], [[Advanced Encryption Standard|AES]] and [[RSA (cryptosystem)|RSA]] |
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* [[HyperTransport]] Tunnel |
* [[HyperTransport]] Tunnel |
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* A [[PIC |
* A [[PIC microcontrollers|PIC16F84]] core<ref>risc16f84 https://opencores.org/projects/risc16f84</ref> |
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* [[Zet (hardware)|Zet]] – an [[x86]] compatible core<ref>zet86 |
* [[Zet (hardware)|Zet]] – an [[x86]] compatible core<ref>zet86 https://opencores.org/projects/zet86</ref> |
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==OpenRISC ASIC== |
==OpenRISC ASIC== |
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In April 2011 OpenCores opened donations<ref>[ |
In April 2011 OpenCores opened donations<ref>[https://opencores.org/donation Call for OpenRISC ASIC donations, 30 April 2011] {{webarchive|url=https://web.archive.org/web/20110501111002/http://opencores.org/donation |date=1 May 2011 }}</ref> for a new project to develop a complete [[system on a chip]] design based on the OpenRISC processor and implement it into an [[Application-specific integrated circuit|ASIC]]-component. OpenCores affiliated with OpenCores,{{clarify|date=July 2019}} for example [[OpenSPARC]] and [[LEON]]. |
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==See also== |
==See also== |
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==References== |
==References== |
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{{Reflist}} |
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<references/> |
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==External links== |
==External links== |
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| ⚫ | * {{cite journal |url= http://jolt.law.harvard.edu/articles/pdf/v25/25HarvJLTech131.pdf |
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{{Programmable Logic}} |
{{Programmable Logic}} |
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Latest revision as of 07:54, 28 July 2023
OpenCores is a community developing digital open-source hardware through electronic design automation (EDA), with a similar ethos to the free software movement. OpenCores hopes to eliminate redundant design work and significantly reduce development costs. A number of companies have been reported as adopting OpenCores IP in chips,[1][2] or as adjuncts to EDA tools.[3][4] OpenCores is also sometimes cited as an example of open source in the electronics hardware community.[5]
OpenCores has always been a commercially owned organization. In 2015, its core active users established the independent Free and Open Source Silicon Foundation (FOSSi Foundation), and created another directory on the librecores.org[6] website as the basis for all future development, independent of commercial control. It has been shut down to redirect to a post on the FOSSi Foundation website seven years later in favor of a simple web search, reasoning that "free and open source silicon is no longer a dream".[7]
History[edit]
Damjan Lampret, one of the founders of OpenCores, stated on his website that it began in 1999.[8] The new website and its objectives were reported publicly by EE Times in 2000[9] and CNET News in 2001.[10] Through the following years it was supported by advertising and sponsorship, including by Flextronics.[1]
In mid-2007 an appeal was put out for a new backer.[11] That November, Swedish design house ORSoC AB[12] agreed to take over maintenance of the OpenCores website.[13]
EE Times reported in late 2008 that OpenCores had passed the 20,000 subscriber mark.[14] In October 2010 it reached 95,000 registered users and had approximately 800 projects. In July 2012 it reached 150,000 registered users.
During 2015, ORSoC AB formed a joint venture with KNCMiner AB to develop bitcoin mining machines. As this became the primary focus of the business, they were able to spend less time with the opencores.org project. In response to the growing lack of commitment, the core OpenRISC development team set up the Free and Open Source Silicon Foundation (FOSSi), and registered the librecores.org website as the basis for all future development, independent of commercial control.[15]
Licensing[edit]
In the absence of a widely accepted open source hardware license, the components produced by the OpenCores initiative use several different software licenses. The most common is the GNU LGPL, which states that any modifications to a component must be shared with the community, while one can still use it together with proprietary components. The less restrictive 3-clause BSD license is also used in some hardware projects, while the GNU GPL is often used for software components, such as models and firmware.
The OpenCores library[edit]
The library will consist of design elements from central processing units, memory controllers, peripherals, motherboards, and other components. Emerging semiconductor manufacturers could use the information and license designs for free.
The emphasis is on digital modules called "cores", commonly known as IP Cores. The components are used for creating both custom integrated circuits (ASICs) and FPGAs.
The cores are implemented in the hardware description languages Verilog, VHDL or SystemC, which may be synthesized to either silicon or gate arrays.
The project aims at using a common non-proprietary system bus named Wishbone, and most components are nowadays adapted to this bus.
Among the components created by OpenCores contributors are:
- OpenRISC – a highly configurable RISC central processing unit
- Amber (processor core) – an ARM-compatible RISC central processing unit
- A Zilog Z80 clone
- USB 2.0 controller
- Tri Ethernet controller, 10/100/1000 Mbit
- Encryption units, for example DES, AES and RSA
- HyperTransport Tunnel
- A PIC16F84 core[16]
- Zet – an x86 compatible core[17]
OpenRISC ASIC[edit]
In April 2011 OpenCores opened donations[18] for a new project to develop a complete system on a chip design based on the OpenRISC processor and implement it into an ASIC-component. OpenCores affiliated with OpenCores,[clarification needed] for example OpenSPARC and LEON.
See also[edit]
References[edit]
- ^ a b Andrew Orlowski, "Flextronics demos open source chips", The Register, 12 December 2003, [1]
- ^ Rick Merritt, "Vivace plans to release HD media processors", EE Times India (online edition), 20 April 2006 [2] Archived 7 January 2015 at the Wayback Machine
- ^ Dylan McGrath, "Firm packages OpenCores IP with EDA tool", EE Times (online edition), 9 January 2006 [3]
- ^ "OVP Simulator Smashes SystemC TLM-2.0 Performance Barrier", EDA Cafe, 5 February 2009 [4]
- ^ Richard Goering, "Doors 'open' to hardware", EE Times (online edition), 6 June 2005 [5]
- ^ librecores.org
- ^ Philipp Wagner, "Mission accomplished! LibreCores is closing down", 19 October 2022 [6]
- ^ "Home". lampret.com.
- ^ Peter Clarke, "Free 32-bit processor core hits the Net", EE Times, 28 February 2000 [7]
- ^ John G Spooner, "Open-source credo moves to chip design", CNET News, 27 March 2001 [8]
- ^ Peter Clarke, "OpenCores website, brand up for sale", EE Times Europe (online edition), 25 June 2007 [9]
- ^ ORSoC AB
- ^ Peter Clarke, "Swedish design house agrees to maintain OpenCores", EE Times Europe (online edition), 28 November 2007 [10]
- ^ Anne-Francoise Pele, "OpenCores records 20,000 users", EE Times Europe (online edition), 28 October 2008 [11]
- ^ Announcement of FOSSi at ORConf2015, CERN, Genva. schedule Archived 8 April 2016 at the Wayback Machine and video
- ^ risc16f84 https://opencores.org/projects/risc16f84
- ^ zet86 https://opencores.org/projects/zet86
- ^ Call for OpenRISC ASIC donations, 30 April 2011 Archived 1 May 2011 at the Wayback Machine
External links[edit]
- Official website
- Greenbaum, Eli (2011). "Open Source Semiconductor Core Licensing" (PDF). Harvard Journal of Law & Technology (JOLT). 25 (1). Harvard: 131–157.