AMD Duron
| AMD Duron >> | |
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| Production: | 2000 to 2004 |
| Producer: | AMD |
| Processor clock: | 600 MHz to 1.8 GHz |
| FSB cycle: | 100 MHz to 133 MHz |
| L2 cache size: | 64 KiB |
| Instruction set : | x86 |
| Microarchitecture : | AMD K7 |
| Base: | Base A |
Names of the processor cores:
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AMD Duron is the brand name of a range of affordable microprocessor models from Advanced Micro Devices that were produced between 2000 and 2004. They are based as offered in the same period Athlon processors on the microarchitecture AMD K7 . While Athlon models were also produced for the so-called slot A , Duron models only came on the market as CPGA for socket A. The name Duron (derived from Latin durus , German hard, enduring ) should indicate the durability of the product. The processor series was marketed in competition with the Celeron models from Intel .
Product history
The first Durons with the development names Spitfire and Morgan were manufactured in 0.18 µm technology and were derived directly from the Athlon Thunderbird or Athlon XP Palomino , but differed from them by reducing the L2 cache to only 64 KiB (which is lower Production costs). This first series was available for clocks up to 950 (Spitfire) or 1,300 MHz (Morgan), always paired with an FSB of 100 MHz.
The later models called Applebred were manufactured in 0.13 µm and were available with 133 MHz FSB and clock frequencies up to 1,800 MHz. The technical basis here was the Athlon XP Thoroughbred A / B with a physically available 256 KiB L2 cache, which was deactivated except for 64 KiB; In this way, chips manufactured for the Athlon product line could also be sold that had errors in the L2 cache, so that the full 256 KiB could not be used. Durons common to all is the L1 cache -size of 2 × 64 KiB and the L2 cache size of 64 KiB on- The , while the base A Athlon generally last with L2 caches 256 or 512 KiB (execution of the Athlon XP codenamed Barton ).
Some examples (series) of the Duron could be overclocked quite a bit by gradually increasing the FSB and simply changing the multiplier.
Despite its quite existing success, the Duron often appeared to be some kind of AMD stepchild. After the 1300 MHz model, it took a long time before variants with 1400, 1600 and 1800 MHz appeared; in addition, the low-end model was never given a performance rating equivalent to that of the Athlon XP. As a result, the Duron had a difficult position in terms of marketing compared to Intel's Celeron CPUs with more than 2 GHz (although it was by no means inferior to it in terms of price and performance). The rather modest reputation of the Duron ultimately led AMD (probably under pressure from major manufacturers such as Lenovo and Asus ) to completely discontinue the model series in 2004 and began to populate the lower performance segment with the new Sempron processors, the technically full Athlon XP with comparatively low clock rates (from 1500 MHz).
Model data
Spitfire
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 64 KiB with processor clock
- MMX , Extended 3DNow!
- Socket A , EV6 with 100 MHz Front Side Bus (FSB 200)
- Operating voltage (VCore): 1.50–1.60 V.
- First release date: June 19, 2000
- Manufacturing technology: 0.18 µm
- The size: 100.0 mm² with 25.0 million transistors
- Clock rates: 600–950 MHz
- 600 MHz [19. June 2000]
- 650 MHz [19. June 2000]
- 700 MHz [19. June 2000]
- 750 MHz [5th September 2000]
- 800 MHz [17. October 2000]
- 850 MHz [8th January 2001]
- 900 MHz [2nd April 2001]
- 950 MHz [6. June 2001]
Morgan
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 64 KiB with processor clock
- MMX , Extended 3DNow! , SSE
- Socket A , EV6 with 100 MHz Front Side Bus (FSB 200)
- Operating voltage (VCore): 1.75 V.
- First release date: August 20, 2001
- Manufacturing technology: 0.18 µm
- Clock rates: 0.9–1.3 GHz
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The size: 105.68 mm² with 25.2 million transistors
- 1.0 GHz [20. August 2001]
- 1.1 GHz [1st October 2001]
- 1.2 GHz [15. November 2001]
- 1.3 GHz [21. January 2002]
Applebred
The Applebred core is similar to a Thoroughbred A / B core of the Athlon XP , in which parts of the L2 cache are deactivated.
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 64 KiB with processor clock
- MMX , Extended 3DNow! , SSE
- Socket A , EV6 with 133 MHz Front Side Bus (FSB 266)
- Operating voltage (VCore): 1.50 V.
- First publication date: August 21, 2003
- Manufacturing technology: 0.13 µm
- The size: 80.89 mm², 84.66 mm² or 86.97 mm² with 37.2 million transistors
- Clock rates: 1.4–1.8 GHz
- 1.4 GHz [21. August 2003]
- 1.6 GHz [21st August 2003]
- 1.8 GHz [21st August 2003]
