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AMD K6 logo
Production: 1997 to 1999?
Producer: AMD
Processor clock: 166 MHz to 300 MHz
FSB cycle: 66 MHz
L1 cache size: 64 KiB
Instruction set : x86
Base: Base 7
Names of the processor cores:
  • Model 6
  • Little Foot (Model 7)

The AMD K6 is an x86 - Microprocessor company AMD (Advanced Micro Devices) and was originally developed by the company NexGen under the name Nx686 developed. It is considered the main competitor to the Intel Pentium MMX or Intel Pentium II and also competed with the Cyrix 6x86MX .


In the course of the takeover of NexGen by AMD, the Nx686 was adapted to socket 7 and received Intel's MMX technology - the AMD K6 was created. Vinod Dham , who is known as the “father of the Pentium”, played a key role in the development of both processors, the Nx686 and the K6 . The K6 was AMD 's first serious competitor to Intel's Pentium processor developments and was first positioned as an alternative to the Pentium MMX . After the appearance of the Pentium II , AMD had to assert itself against this new generation with faster models.



The K6 marks the use of a new generation of processors, the first model of which was itself. However, there are a total of three development stages of this generation: The actual K6 (166 to 300 MHz) and its successor K6-2 (266 to 550 MHz, with 3DNow! Technology) and K6-III (400 and 450 MHz, with integrated L2- Cache). The K6 itself consists of two models, which differ mainly in the manufacturing process and therefore also in the maximum clock frequency and operating voltage as well as the resulting maximum power loss.


Block diagram of the K6 architecture.

As it is based on a NexGen design, the K6 has almost nothing in common with its predecessor, the K5 , although both were designed or developed internally as RISC processors.


The K6 processors "Model 6" require an I / O voltage (VIO) of 3.3 V. With sufficient cooling, a K6 233 MHz with VCore = 3.2 V (Model 6) can also operate with VCore = 3.3 V operated. This means that it can also be operated on Socket 7 mainboards that do not yet provide a shared power supply (VCore / VIO) for the CPU. Such mainboards usually only allow the setting of the multipliers from 1.5 to 3.0 using two jumpers or DIP switches. This means that the K6 233 MHz can only be operated at a maximum of 200 MHz. A multiplier of 1.5 is interpreted by the K6 as 3.5, however, if only two jumpers or DIP switches are available for setting the multiplier and thus a maximum of 3.0 can be set. This means that the K6 233 MHz can also be operated on these old mainboards with the maximum permissible clock frequency, although the voltage regulator for the CPU voltage usually requires a generously designed additional cooling.


In retrospect, the K6 and its derivatives were a double-edged sword for AMD in terms of performance. Due to its slow floating point unit (because it does not have a pipeline ), the K6 does not stand a chance against its direct competitors, the Intel processors Pentium MMX and Pentium II , in FPU-heavy applications such as the then emerging 3D games. In addition, the Pentium II could access the fast L2 cache directly on the processor module, while the processors of the K6 and K6-2 series still used the L2 cache of the (super) Socket 7 mainboard. This bandwidth disadvantage made to create the AMD CPUs, only the K6-III and the mobile versions K6-2 + and K6-III + ran at the end of K6 era thanks to the The integrated Level 2 cache to top form. These clearly show the advantages of the K6 architecture: A fast integer unit with a very short pipeline, an intelligent branch prediction unit and a translation lookaside buffer that was very large for the time, gave it a high level of efficiency ( instructions per cycle ). In a test against the successor architecture K7 with the same clock frequency, the K6-2 + emerged as the winner in many integer-heavy benchmarks. But while the only six-stage integer pipeline made the K6 design largely independent of software optimizations, on the other hand, this low-latency design significantly limited the maximum clock frequency: the K6 architecture reached its maximum at 570 MHz, while the successor K7 design over-scaled the years to well over 2 GHz.

Model data

K6 (Model 6)

K6 with 166 MHz (Model 6)
  • L1 cache: 32 + 32 KiB (data + instructions)
  • MMX
  • Socket 7 with 66 MHz
  • Release DATE: April 2,  1997
  • Operating voltage (VCore): 2.9 V (233 MHz: 3.2 V)
    K6 with 233 MHz (Model 6) and 3.2 V.
  • Manufacturing technology: 0.3 µm
  • Die size : 162 mm² or 157 mm² with 8.8 million transistors
  • Clock rates (power consumption):
    • 166 MHz (17.2 W)
    • 200 MHz (20.0 W)
    • 233 MHz (28.3 W)

K6 (Little Foot / Model 7)

K6 with 300 MHz (Little Foot)
  • L1 cache: 32 + 32 KiB (data + instructions)
  • MMX
  • Socket 7 with 66 MHz
  • Operating voltage (VCore): 2.2V
  • Release DATE: January 6,  1998
  • Manufacturing technology: 0.25 µm
  • Die size : 68 mm² with 8.8 million transistors
  • Clock rates (power consumption):
    • 200 MHz (12.45 W)
    • 233 MHz (13.50 W)
    • 266 MHz (14.55 W)
    • 300 MHz (15.40 W)

See also

Web links

Commons : AMD K6  - collection of pictures, videos and audio files

Individual evidence

  1. Andreas Stiller: INSPECTION . In: c't . No. 18 , 1999, p. 154 ff . ( ( Memento from January 12, 2009 in the Internet Archive ) [accessed on January 12, 2009] Performance comparison of various CPUs, including K6-2 and K6-III with the same clock frequency).
  2. AMD K6-2 + against AMD Duron - meeting of the generations (