AMD Am29000

That of an AMD Am29000

That of an AMD Am29030

That of an AMD Am29040

That of an AMD Am29050

The AMD 29000 , also often simply 29k , was a popular family of 32-bit RISC - microprocessors , developed by AMD . The AMD 29000 were at times the most popular RISC chips on the market, widely used in laser printers from many manufacturers. At the end of 1995, AMD stopped developing the 29k because the development team was transferred to support the PC division. The rest of AMD's embedded business has been realigned for the Embedded 186 family of 80186 descendants. The majority of AMD's resources have been focused on the high-performance, x86 clone business that used many ideas and portions of the past 29k to produce the AMD K5 .

History and architecture

The 29k evolved from the Berkeley RISC design, which also influenced Sun SPARC and Intel i960 . One trick in all Berkeley- derived chip designs is the concept of the register window , a technique used to significantly speed up procedure calls. The basic idea is to use a large number of processor registers as a stack, which loads local data into a register set during a call and marks them as "dead" when the procedure is finished. Values returned by the routines are placed in the "global page", the top eight registers in SPARC. It is interesting to note that Stanford University's competing early RISC design , Stanford MIPS , also adhered to this concept, however it was ultimately decided that more advanced compilers would allow more efficient use of general-purpose registers than hardwired register windows, which has been proven correct over the years .

In the original SPARC and i960 design, there was a fixed window size. A routine with only one local variable used eight processor registers and wasted this precious resource. The 29k, on the other hand, has a variable window size. In this example only two registers would be used, one for the variable and the other for the return address. The 29k also had more registers, including the 128-bit registers for the procedure stack, and 64 more for global access. For comparison: The SPARC had a total of 128 registers. These changes, combined with a good compiler, resulted in the best of both worlds in procedural call performance while still leaving registers for other work.

Another, not so extraordinary difference to SPARC is that the 29k did not contain any status code registers. Each register could be used for status codes, which simplifies the status assurance, but at the price of possibly more complicated code. An instruction buffer for up to 16 instructions was used to increase the performance during jumps. The 29k did not contain a jump prediction, so there was a delay as soon as a jump was taken (and the 29k was not originally superscalar , so it could not, as is common in other designs, do "both sides"). The buffer alleviated this by allowing it to store four instructions from the "other side" of the branch, which could run immediately while the buffer is being refilled with instructions from memory.

Models and variants

The first 29k appeared in 1988, with a built-in MMU , although a floating point unit only came with the 29027 . The 29005 was a stripped down version. The series was upgraded with the 29030 and 29035 , which contained an 8 kB and 4 kB instruction cache, respectively. Another update integrated part of the FPU directly on the adding 4 kB data cache, from which the 29040 was created.

The last general-purpose version was the 29050 , which incorporated a full FPU and therefore had much better floating point performance than older versions.

The types 29000, 29005 and 29050 had three bus systems each for addresses, data and instructions, the types 29030, 29035 and 2940 had two bus systems each for addresses and for data and instructions.

Some parts of the 29050 design were used as the basis for the AMD K5 , an x86-compatible processor. The FPU of the 29k was used unchanged for this, while the rest of the core design was used together with complex microcode to convert machine instructions of the x86 architecture into 29k instructions at runtime.

Model data

Am29000 / Am29005

AMD Am29000-16GC

Technical specifications

L1 cache: does not exist
Design: 168-pin PQFP or 169-pin PGA
Operating voltage (VCore): 5V
Publication date: ?
Manufacturing technology: CMOS
Clock rates:
- 16 MHz (Am29000 and Am29005)
- 20, 25, 30 and 33 MHz (only Am29000)