AMD Athlon XP-M
AMD Athlon XP-M >> | |
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Production: | 2001 to 2005 |
Producer: | AMD |
Processor clock: | 850 MHz to 2.2 GHz |
FSB cycle: | 100 MHz ( FSB ) to 800 MHz ( HT ) |
L2 cache size: | 128 KiB to 512 KiB |
Instruction set : | x86 or AMD64 |
Microarchitecture : | K7 and K8 / AMD64 |
Base: | |
Names of the processor cores:
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The Mobile Athlon 4 or later Athlon XP-M is a notebook processor from AMD . It is essentially based on the Athlon XP , but also has the PowerNow! that makes it suitable for mobile use. The CPU first appeared as Mobile Athlon 4, but was later renamed Athlon XP-M. The only significant difference between the two is that the latter uses the P-Rating, already known from the Athlon XP, to classify performance.
The mobile Athlons exist in two designs: µPGA and OPGA. The latter is the familiar shape of socket A in desktop boards. Due to the selectable multiplier, the mostly low supply voltage and the good overclockability (see overclocking ), especially of the Barton-based models, such processors are quite popular among "computer hobbyists".
Model data socket A
Palomino (as Mobile Athlon 4)
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 256 KiB with processor clock
- MMX , Extended 3DNow , SSE , PowerNow!
- Socket A , EV6 with 100 MHz Front Side Bus (FSB 200)
- Operating voltage ( VCore ): 1.55 V.
- First release date: May 14, 2001
- Manufacturing technology: 0.18 µm
- The size: 129.26 mm² with 37.5 million transistors
- Clock rates: 0.85–1.2 GHz
- 850 MHz [14. May 2001]
- 900 MHz [14. May 2001]
- 950 MHz [14th May 2001]
- 1.0 GHz [14th May 2001]
- 1.1 GHz [20. August 2001]
- 1.2 GHz [12. November 2001]
Palomino (as Athlon XP-M)
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 256 KiB with processor clock
- MMX , Extended 3DNow , SSE , PowerNow!
- Socket A , EV6 with 100 MHz Front Side Bus (FSB 200)
- Operating voltage (VCore): 1.40 V.
- First release date: January 28, 2002
- Manufacturing technology: 0.18 µm
- The size: 129.26 mm² with 37.5 million transistors
- Clock rates: 1.2–1.4 GHz
- 1400+: 1.2 GHz
- 1500+: 1.3 GHz [28. January 2002]
- 1600+: 1.4 GHz [13. March 2002]
Thoroughbred A / B
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 256 KiB with processor clock
- MMX , Extended 3DNow , SSE , PowerNow!
- Socket A , EV6 with 100 MHz (T-Bred A, FSB 200) and 133 MHz (T-Bred B, FSB 266) front side bus
- Operating voltage (VCore): maximum 1.65 V (DTR)
- First publication date: April 17, 2002
- Manufacturing technology: 0.13 µm
- The size: 80.89 mm², 84.66 mm² or 86.97 mm² with 37.2 million transistors
- Clock rates: 1.200–2.133 GHz
- Default:
- 1400+: 1.200 GHz [17. April 2002]
- 1500+: 1.333 GHz [17. April 2002]
- 1600+: 1.400 GHz [10. June 2002]
- 1700+: 1.466 GHz [10. June 2002]
- 1800+: 1.533 GHz [15. July 2002]
- 1900+: 1.600 GHz [24. September 2002]
- 2000+: 1.667 GHz [24. September 2002]
- 2200+: 1.800 GHz [11. November 2002]
-
Desktop replacement (DTR):
- 1500+: 1.333 GHz [11. November 2002]
- 1600+: 1.400 GHz [11. November 2002]
- 1700+: 1.466 GHz [11. November 2002]
- 1800+: 1.533 GHz [11. November 2002]
- 1900+: 1.600 GHz [11. November 2002]
- 2000+: 1.667 GHz [12. March 2003]
- 2200+: 1.800 GHz [12. March 2003]
- 2400+: 2,000 GHz [12. March 2003]
- 2600+: 2.133 GHz [12. March 2003]
- LV:
- 1400+: 1.266 GHz [12. March 2003]
- 1500+: 1.333 GHz [12. March 2003]
- 1600+: 1.400 GHz [12. March 2003]
- 1700+: 1.466 GHz [12. March 2003]
- 1800+: 1.533 GHz [12. March 2003]
- Default:
Barton

- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 512 KiB with processor clock
- MMX , Extended 3DNow , SSE , PowerNow!
- Socket A , EV6 with 133 MHz Front Side Bus (FSB 266)
- Operating voltage (VCore): 1.35 V (LV), 1.45 V (standard), 1.55 V (XP-M 2800+), 1.65 V (DTR)
- Initial release date: June 7, 2003
- Manufacturing technology: 0.13 µm
- The size: 100.99 mm² with 54.3 million transistors
- Clock rates: 1.466-2.200 GHz
- Default:
- 1900+: 1.466 GHz
- 2000+: 1.533 GHz
- 2100+: 1.600 GHz
- 2200+: 1.667 GHz
- 2400+: 1.800 GHz
- 2500+: 1.866 GHz
- 2600+: 2,000 GHz
- 2800+: 2.133 GHz
-
Desktop replacement (DTR):
- 2600+: 2,000 GHz
- 2800+: 2.133 GHz [7th June 2003]
- 3000+: 2,200 GHz
- LV:
- 1900+: 1.466 GHz [17. June 2003]
- 2000+: 1.533 GHz [17. June 2003]
- 2100+: 1.600 GHz [17. June 2003]
- 2200+: 1.667 GHz
- 2400+: 1.800 GHz
- Default:
Model data socket 754
All processors for socket 754 have a memory controller with one channel (64 bit, single-channel operation) for DDR-SDRAM .
Dublin
Note: Belongs to the K8 generation , but was sold as the Athlon XP-M mainly in HP zv5200 series notebooks.
- Revision CG
- L1 cache: 64 + 64 KiB (data + instructions)
- L2 cache: 128 or 256 KiB with processor clock
- MMX , Extended 3DNow , SSE , SSE2 , PowerNow! , NX bit
- Socket 754 , HyperTransport with 800 MHz (HT 1600)
- Operating voltage ( VCore ): 1.40 V.
- Power consumption ( TDP ):
- Release DATE: 3rd Quarter 2004
- Manufacturing technology: 0.13 µm (SOI)
- Clock rates:
- 2800+: 1,600 GHz (128 KiB L2 cache)
- 3000+: 1,600 GHz (256 KiB L2 cache)