AMD Athlon 64

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AMD Athlon64 Badge.svg
Athlon 64 emblem
Production: 2003 to 2009
Producer: AMD
Processor clock: 1.6 GHz to 2.6 GHz
HT cycle: 800 MHz to 1000 MHz
L2 cache size: 512 KiB to 1 MiB
Instruction set : x86 / AMD64
Microarchitecture : K8 / AMD64
Names of the processor cores:
  • Clawhammer
  • Newcastle
  • Winchester
  • Venice (Manchester)
  • San Diego (Toledo)
  • Orleans (Windsor)
  • Lima (Brisbane)
  • Huron

The AMD Athlon 64 is a microprocessor for computers and the second representative of the AMD K8 generation. It was launched in 2003 and has the AMD64 microarchitecture.

The Athlon 64 is the successor to the AMD Athlon XP . In addition to the desktop version, there are also models for notebooks ( Mobile Athlon 64 or Turion 64 Mobile Technology ), for low-cost systems ( Sempron ) and for the high-end market ( AMD Athlon 64 FX ). In 2007 there were also models that did not include the "64" in their names. AMD Athlon based on K8 is sometimes also referred to as Athlon LE or Athlon 64 LE in parlance to differentiate it from the AMD Athlon based on K7 , but these names do not correspond to the official designation. The Athlon 64 is generally not suitable for multiprocessor systems, the suitable variant of the Athlon64 family is sold under the name AMD Opteron . However, with the AMD Athlon 64 X2, a CPU was brought onto the market that has two CPU cores ( dual core ) and therefore behaves similarly to a dual CPU system.


In the beginning, AMD apparently had manufacturing problems with the Athlon 64 and could not clock the models high enough. The cause was suspected to be parasitic capacitances in the SOI process, which is otherwise very energy-saving, especially at partial load . The launch was significantly delayed and about a year behind the original schedule. For this reason it was initially uncertain whether AMD would succeed with the Athlon 64 and keep up with Intel's Pentium 4 . The problems could be resolved through improvements in production and newer stepping of the Athlon 64.

The Athlon 64 has completely replaced the Athlon XP: AMD offered models with a model rating of 2800+ to 4000+ based on the old Quantispeed rating and thus covered the entire market. The AMD Sempron was developed for the budget area . In 2007 the rating for new processors was dropped again and the “64” in the name was also considered superfluous, since all x86 processors were now 64-bit capable. Newer models can therefore be found under the name Athlon , to which a model number is attached. The model number consists of two letters followed by a hyphen and a four-digit number (e.g. LE-1620). The first letter stands for the performance class, L means subclass. The second letter indicates the approximate power loss, E means less than 65 W TDP. The first digit of the four-digit number stands for the type family, the other three digits assign the processor within this type family.

Processor socket

Socket 754
The Athlon 64 for Socket 754 only has a single-channel memory interface and therefore needs 754 pins and four-layer motherboards. This base served as the first platform for the Athlon 64, but was then replaced by the base 939.

Socket 754 served until mid-2006 as a platform for the AMD Sempron and for the Notebook processors Mobile Athlon 64 , Turion 64 and Mobile Sempron .

Socket 939
The socket 939 offers the Athlon 64 a dual-channel memory interface. Because the memory bandwidth is doubled, the Socket 939 CPUs have a higher performance than the Socket 754 models. AMD therefore uses a different performance rating to do justice to this fact; Athlon 64 for Socket 939 have a higher rating than Socket 754 with the same clock frequency and L2 cache. In mid-2006, it was replaced by Socket AM2.

Socket 940
The really only for the AMD Opteron thought Socket 940 was initially as a platform for the Athlon 64 FX used which was just a renamed Opteron in principle. After a short time, however, this became superfluous for the desktop market, as AMD also designed the Athlon 64 FX for the Socket 939 and AM2.

Socket AM2
The Athlon 64 connects DDR2-SDRAM via socket AM2 , still via two memory channels. In addition, the processors for this socket support the AMD-V virtualization technology . For marketing reasons, the focus is increasingly on dual-core processors , which led to the discontinuation of production of the Athlon 64 series in 2007; Single-core models for the AM2 socket are only produced within the Athlon series (without "64").

Ball Grid Array ASB1
The ASB1 package is a miniaturized Ball Grid Array (BGA) especially for the Athlon Neo ( Huron core) to be soldered in subnotebooks or netbooks to save space . The BGA occupies an area of ​​27 mm by 27 mm with a profile height of 2.5 mm.

Processor cores

There are several processor cores for the Athlon 64, named Clawhammer , Newcastle , Winchester , Venice , San Diego and Orleans .

The Clawhammer is the oldest core, its revision C0 in 130 nm production formed the basis for the first Athlon 64 with 1  MiB L2 cache, which were delivered from mid- 2003 . The integrated memory controller of revision C0 cannot speed up the RAM with extensive memory configurations (especially with three or more double-sided modules). With three PC3200 memory modules with 512 MiB each, a maximum of 166 MHz instead of 200 MHz is possible, with three 1 GiB modules the controller even has to switch down to 100 MHz memory clock, as otherwise reliable signal transmission cannot be guaranteed.

In addition to improved thermal design and expanded power management, the newer revision CG offered minor improvements to the memory controller and the new "2T Command Rate" option, which increased the maximum memory rate for large configurations. A memory request is not signaled via the processor pins for one cycle, as usual, but held for two cycles so that reliable signal detection is possible even with high cycles. This security is bought at the cost of a loss of transmission bandwidth. Whether the 2T overhead can be outweighed by the higher memory rate must be determined on a case-by-case basis. Some BIOS versions activate 2T by default in any case and thus slow down “fast” memory configurations unnecessarily by up to 15%.

The name Newcastle first appeared in connection with Clawhammer processors, in which half of the L2 cache was deactivated and which ran with more clock to compensate for nominally the same performance. Later there were "real" Newcastle CPUs, which physically only had 512 KiB cache.

Then AMD introduced the Winchester (Revision D0), which represents the migration to 90 nm production. The smaller structure widths enabled higher clock rates with lower power consumption. The 90 nm production reduced the power loss of the Winchester core by up to 20% compared to the Newcastle core, so that more efficient cooling was possible under the same conditions. The memory controller has been improved again.

Relatively shortly after the Winchester , the next core called Venice (revision E3, 512 KiB L2 cache) followed, which supported SSE3 for the first time and was also manufactured in 90 nm. With these processors, AMD integrated the dual stress liner technology developed jointly with IBM into the manufacturing process for the first time . Thanks to a stretched crystal lattice, the transistors in the chip can switch up to 24% faster with the same power loss. In practice, AMD anticipates a 16% increase in clock potential, which would result in a core clock of up to 2800 MHz. The memory controller of revision E3 has been improved again. Extensive memory configurations only have to be slowed down with a 2T command rate if four double-sided DIMMs are used that are to run with DDR-400. All other configurations can be operated at maximum speed. The memory transfer performance is increased by doubling the number of write-combine buffers, and the performance in connection with UMA graphics cards has also been increased. In addition, the Venice supports new values ​​for the memory dividers. This makes it possible to use DDR-500 memory modules (not JEDEC-specified) if the BIOS supports the new memory divider. The increase in performance through this increase in memory bandwidth is only in the lower single-digit percentage range. Shortly after the Venice E3 stepping was launched, three errors were discovered in the processors. The new write-combination buffers proved to be impractical and had to be switched off by the BIOS when the system was booted. If that didn't happen, the system could freeze at an unpredictable time. AMD therefore relaunched the Venice processor a short time later in the corrected E6 version.

For the first time there is also a variant of the Venice with 1024 KiB L2 cache, which runs under the name San Diego (E4). These CPUs are generally not affected by the Venice problems.

The core Orleans is also manufactured in 90 nm, but supports DDR2 memory and the virtualization technology AMD-V . So that the new capabilities can be used, the new core has the new AM2 socket .

The newer Lima core is identical to the Orleans, but it is manufactured in 65 nm, which reduces the power loss.

With the Windsor core , the first processors of the K8 generation were presented, which AMD re-released under the pure label Athlon. Internally it is actually a dual core, although one of these two is switched off. With this measure, AMD increases the yield on the one hand, since processors can also be sold in which a core does not function correctly. In addition, the maximum power loss can be kept at the level of 45 watts, although these processors were still produced in a 90 nm production process.

The Huron core is designed to be installed as a single core processor in ultra-mobile computers, such as larger netbooks. It is manufactured in 65 nm and has a TDP of 15 watts. The first copies came into circulation in January 2009. It is sold in mini notebooks together with a graphics unit integrated in the M690T chipset as a Yukon platform. AMD also announced a dual-core variant as the Congo platform.

Model data socket 754

All processors for socket 754 have a memory controller with one channel (64 bit, single-channel operation) for DDR-SDRAM .



Athlon 64 3400+ (Rev. CG)


AMD Athlon 64 3000+, Venice.

Model data socket 939

All processors for socket 939 have a memory controller with two channels (128 bit, dual-channel operation ) for DDR-SDRAM .





Athlon 64 3000+ (Rev. E3)

San Diego

Manchester with a deactivated core

Toledo with a deactivated core

Model data socket AM2

All processors for the AM2 socket have a memory controller with two channels (128 bit, dual-channel operation ) for DDR2 SDRAM .

Energy classes

The AMD Athlon 64 is manufactured in different energy classes. A differentiation between the models is only possible on the basis of the OPN . This number is located on the processor housing under the processor designation.

Beginning of the OPN maximum power consumption Energy class
ADDxxxxxxxxxx 35 watts EE SFF
ADHxxxxxxxxxx 45 watts default
ADNxxxxxxxxxx 62 watts default
ADOxxxxxxxxxx 65 watts default
ADAxxxxxxxxxx 89 watts default
ADVxxxxxxxxxx 89 watts default
ADXxxxxxxxxxx 125 watts


  • EE : E nergy E fficient means that the CPU consumes less power in comparison and therefore the power loss is lower.
  • SFF : S mall F orm F actor means that the power loss has been significantly reduced again compared to EE. The CPU therefore requires less expensive cooling and is therefore suitable for smaller computer cases.




Model data ASB1


Individual evidence

  1. Heise online: AMD: 45-watt dual cores and the departure from QuantiSpeed , June 5, 2007.
  2. AMD website, August 18, 2009 ( Memento of February 12, 2009 in the Internet Archive )
  3. Heise online: AMD brings new 45 watt single core processors and lowers prices . October 8, 2007.

See also

Web links