AMD Mobile Sempron

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AMD Mobile Sempron
Mobile sempron logo.svg
Production: since 2005
Producer: AMD
Processor clock: 1.6 GHz to 2.0 GHz
HT cycle: 800 MHz
L2 cache size: 128 kB to 256 kB
Instruction set : x86 / AMD64
Microarchitecture : K8 / AMD64
Base:
Names of the processor cores:
  • Georgetown
  • Albany
  • Dublin
  • Sonora
  • Roma
  • Richmond
  • Keene
  • Sherman

Mobile Sempron is a brand name for notebook processors from AMD . The name has been used since the introduction of the K8 architecture in 2005 for single-core CPUs in the lowest price segment.

The Mobile Sempron is being further developed in line with the models of the Athlon or Turion family, but this is not reflected in the model name. In the early days, like the AMD Sempron, pure 32-bit processors for the desktop were sold under this name, but the Athlon 64 single core has now been completely replaced.

Since the beginning of 2009, in addition to the classic cheap processors, very economical models with a power consumption of 8 to 15 W have been offered under the Sempron name.

Model data socket 754

All processors for socket 754 have a memory controller with one channel (72 bit, single-channel operation) for DDR-SDRAM .

Desktop replacement

Georgetown

Revision D0
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 128 kB or 256 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , PowerNow! , NX bit
  • Socket 754 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.40 V.
  • Power consumption ( TDP ): 62 W
  • Publication date:
  • Manufacturing technology: 90 nm ( SOI )
  • The size:
  • Clock rates: 1600–2000 MHz
    • 2700+: 1600 MHz (128 kB L2 cache)
    • 2800+: 1600 MHz (256 kB L2 cache)
    • 3000+: 1800 MHz (128 kB L2 cache)
    • 3100+: 1800 MHz (256 kB L2 cache)
    • 3300+: 2000 MHz (128 kB L2 cache)

Albany

Revision E6
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 128 kB or 256 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , PowerNow! , NX bit
  • Socket 754 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.40 V.
  • Power consumption ( TDP ): 62 W
  • Release DATE: July 2005
  • Manufacturing technology: 90 nm ( SOI )
  • The size:
  • Clock rates: 1800–2000 MHz
    • 3000+: 1800 MHz (128 kB L2 cache)
    • 3100+: 1800 MHz (256 kB L2 cache)
    • 3300+: 2000 MHz (128 kB L2 cache)
    • 3400+: 2000 MHz (256 kB L2 cache)

Low voltage

Dublin

Revision CG
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 128 kB or 256 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , PowerNow! , NX bit
  • Socket 754 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.20 V.
  • Power consumption ( TDP ): 25 W
  • Release DATE: February 2005
  • Manufacturing technology: 130 nm ( SOI )
  • The size:
  • Clock rates: 1600–1800 MHz
    • 2600+: 1600 MHz (128 kB L2 cache)
    • 2800+: 1600 MHz (256 kB L2 cache)
    • 3000+: 1800 MHz (256 kB L2 cache)

Sonora

Mobile Sempron 2600+ (Rev. D0)
Revision D0
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 128 kB or 256 kB with processor clock
  • MMX , Extended 3DNow !, SSE , SSE2 , PowerNow! , NX bit
  • Socket 754 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.20 V.
  • Power consumption ( TDP ): 25 W
  • Publication date:
  • Manufacturing technology: 90 nm ( SOI )
  • The size:
  • Clock rates: 1600–1800 MHz
    • 2600+: 1600 MHz (128 kB L2 cache)
    • 2800+: 1600 MHz (256 kB L2 cache)
    • 3000+: 1800 MHz (128 kB L2 cache)
    • 3100+: 1800 MHz (256 kB L2 cache)

Roma

AMD Mobile Sempron 3000+.
Revision E6
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 128 kB or 256 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , PowerNow! , NX bit
  • Socket 754 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.20 V.
  • Power consumption ( TDP ): 25 W
  • Release DATE: July 2005
  • Manufacturing technology: 90 nm ( SOI )
  • The size:
  • Clock rates: 1800–2000 MHz
    • 3000+: 1800 MHz (128 kB L2 cache)
    • 3100+: 1800 MHz (256 kB L2 cache)
    • 3300+: 2000 MHz (128 kB L2 cache)
    • 3400+: 2000 MHz (256 kB L2 cache) (Release date: May 2006)

Model data base S1

All processors for socket S1 have a memory controller with two channels (128 bit, dual-channel operation) for DDR2-SDRAM .

Richmond

Revision F2
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 256 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , AMD64 , Cool'n'Quiet , NX-Bit
  • Socket S1 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore):
  • Power consumption ( TDP ): 25 watts
  • Release DATE: May 17, 2006
  • Manufacturing technology: 90 nm ( SOI )
  • The size: 103 mm² with 81.1 million transistors
  • Clock rates: 1800–2200 MHz
    • 3400+: 1800 MHz
    • 3600+: 2000 MHz
    • 3800+: 2200 MHz (31 watt TDP)

Keene

Revision F2
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 512 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , AMD64 , Cool'n'Quiet , NX-Bit
  • Socket S1 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore): 1.175 V (0.950 V in throttled mode at 800 MHz)
  • Power consumption ( TDP ): 25 W
  • Release DATE: May 17, 2006
  • Manufacturing technology: 90 nm ( SOI )
  • The size: 103 mm² with 81.1 million transistors
  • Clock rates: 1600–1800 MHz
    • 3200+: 1600 MHz
    • 3500+: 1800 MHz

Sherman

Revision G2
  • L1 cache: 64 + 64 kB (data + instructions)
  • L2 cache: 256 or 512 kB with processor clock
  • MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , AMD64 , Cool'n'Quiet , NX-Bit
  • Socket S1 , HyperTransport with 800 MHz (HT1600)
  • Operating voltage (VCore):
  • Power consumption ( TDP ): 25–31 W
  • Release DATE: 2007
  • Manufacturing technology: 65 nm ( SOI )
  • The size:
  • Clock rates: 2000–2200 MHz
    • 25 W TDP:
      • 3600+: 2000 MHz (256 kB L2 cache)
      • 3700+: 2000 MHz (512 kB L2 cache)
    • 31 W TDP:
      • 3800+: 2200 MHz (256 kB L2 cache)
      • 4000+: 2200 MHz (512 kB L2 cache)

Sable

Model number frequency L2 cache HT Multiplier Core tension TDP base Release date Order Part Number
Sempron SI-44 512 KiB 3600 MHz Q4 2008
Sempron SI-42 2100 MHz 512 KiB 3600 MHz Q3 2008
Sempron SI-40 2000 MHz 512 KiB 3600 MHz 10x 25 W Socket S1 June 4, 2008 SMSI40SAM12GG

Huron

Model number frequency L2 cache HT Multiplier Core tension TDP Chip housing / socket Release date Order Part Number
Sempron for Ultra-thin notebooks /
Sempron 200U
1000 MHz 256 KiB 1600 MHz 5x 8 W. ASB1 January 8, 2009 SMF200UOAX3DV
Sempron 210U 1500 MHz 256 KiB 1600 MHz 7.5x 15 W BGA January 8, 2009 SMG210UOAX3DX

See also

Web links

Individual evidence

  1. a b c New roadmap for AMD's notebook processors . Computer base. February 27, 2008. Retrieved October 7, 2010.
  2. AMD Notebook CPU comparison page ( Memento of the original from May 27, 2010 in the Internet Archive ) Info: The archive link was inserted automatically and has not yet been checked. Please check the original and archive link according to the instructions and then remove this notice. , accessed January 15, 2009.  @1@ 2Template: Webachiv / IABot / products.amd.com