Intel Pentium D
Intel Pentium D | |
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Intel Pentium D emblem |
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Production: | 2005 to 2008 |
Producer: | Intel |
Processor clock: | 2.66 GHz to 3.6 GHz |
FSB cycle: | 133 MHz to 200 MHz |
L2 cache size: | 2 MiB to 4 MiB |
Instruction set : | IA-32 / Intel 64 |
Microarchitecture : | NetBurst |
Names of the processor cores:
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The Intel Pentium D (codenamed Smithfield and Presler ) is the brand name of a family of dual-core - CPUs made by Intel .
History and architecture
The Pentium D is a microprocessor that was developed by Intel's research and development department in Israel and was first presented to the public in spring 2005 at the Intel Developer Forum . The nm in 90 manufactured Smithfield consists of two on the NetBurst architecture based Pentium-4 - Prescott cores on the . Each of the two cores is equipped with an eight-fold associative 1- MiB -L2 cache . Both cores communicate with the chipset on the motherboard via a shared FSB 800 clocked at 200 MHz . In contrast to this, with the Presler manufactured in 65 nm, two individually manufactured Pentium-4- Cedar-Mill -based dies are later put together on one package , and the cores each have 2 MiB L2 cache. The Pentium D uses the 775 socket and runs on Intel's 945 chipset series as well as the 955X and 975X chipsets.
However, unlike previous models, the Pentium D does not support Hyper-Threading Technology (HTT), which divides each physical core into two additional logical cores. This feature is reserved for the Pentium Extreme Edition , which is given an FSB1066 with the Presler core as an additional distinguishing feature. The Intel Virtualization Technology should already be included in the Smithfield , but was only activated in the Presler .
The Presler is Intel's last model based on the NetBurst architecture and has been replaced by the Core-2 , which is based on the Core micro-architecture .
Origin of name
The meaning of the letter “D” in the name “Pentium D” is unclear. Intel made no official statement about it. There is also no stipulation on the product descriptions. The most frequently cited interpretation is D ual (-core) (Double [core]). Since the Pentium D was the first processor with integrated DTCP-IP support , this is also mentioned as an interpretation.
Model data
Smithfield
- Revision A0, B0
- L1 cache: 16 KiB (data) plus 12,000 µOps (instructions) per core
- L2 cache: 1024 KiB per core with processor clock
- MMX , SSE , SSE2 , SSE3 , Intel 64 , EIST (not with 805 and 820), XD-Bit
- LGA775 , AGTL + with 133 and 200 MHz FSB (quadpumped: FSB 533 and FSB800)
- Core voltage (VCore): 1.25-1.4V
- Power dissipation ( TDP ): 95-130 W.
- Release DATE: April 19, 2005
- Manufacturing technology: 90 nm
- Die size: 206 mm² with 230.0 million transistors
- Clock rates: 2.66-3.2 GHz
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Model Numbers :
- 133 MHz FSB, 95W TDP
- 805: 2.66 GHz
- 200 MHz FSB, 95W TDP
- 820: 2.8 GHz
- 200 MHz FSB, 130W TDP
- 830: 3.0 GHz
- 840: 3.2 GHz
- 133 MHz FSB, 95W TDP
Presler
- Revision B1, C1, D0
- L1 cache: 16 KiB (data) plus 12,000 µOps (instructions) per core
- L2 cache: 2048 KiB per core with processor clock
- MMX , SSE , SSE2 , SSE3 , Intel 64 , XD-Bit , Intel VT , EIST
- LGA775 , AGTL + with 200 MHz FSB (quadpumped: FSB800)
- Core voltage (VCore): 1.225-1.4V
- Power dissipation ( TDP ): 95-130 W.
- Release DATE: January 5, 2006
- Manufacturing technology: 65 nm
- Die size: 162 mm² with 376 million transistors
- Clock rates: 2.8-3.6 GHz
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Model Numbers :
- 95W TDP
- 915: 2.8 GHz (without IVT)
- 920: 2.8 GHz (Rev B1, without EIST)
- 925: 3.0 GHz (without IVT)
- 930: 3.0 GHz (Rev B1 without EIST)
- 935: 3.2 GHz (without IVT)
- 940: 3.2 GHz (Rev B1 without EIST)
- 945: 3.4 GHz (without IVT)
- 950: 3.4 GHz (Rev C1, D0)
- 960: 3.6 GHz (Rev D0)
- 130W TDP
- 950: 3.4 GHz (Rev B1, without EIST)
- 960: 3.6 GHz (Rev C1)
- 95W TDP
See also
Web links
- Documents on the Pentium D at intel.com (English, JavaScript required)
Individual evidence
- ↑ Goodbye Netburst. heise online, August 13, 2007, accessed on September 7, 2011 .
- ↑ Jon Stokes: Intel adds DRM support to Pentium D. ars technica, June 1, 2005, accessed September 7, 2011 .