AMD Turion 64

<<   AMD Turion 64   >>
Production:	2005 to 2007
Producer:	AMD
Processor clock:	1.6 GHz to 2.4 GHz
HT cycle:	800 MHz
L2 cache size:	512 KiB to 1 MiB
Instruction set :	x86 / AMD64
Microarchitecture :	K8L / AMD64
Base: Socket 754 Base S1
Names of the processor cores: Lancaster Richmond

Turion 64 is a notebook processor family from AMD that was officially presented on March 10, 2005 . The AMD Turion 64 X2 came onto the market in 2006 as a dual-core version .

The Turion 64 was developed as an AMD K8L and is a particularly energy-saving variant of the K8 generation . Nevertheless, it has all the other features of this generation.

technology

The Turion 64 is a direct derivative of the Athlon 64 desktop processor for Socket 754 with a single-channel DDR memory interface and Socket S1 with a dual-channel DDR2 memory interface. The Turion 64 is optimized for low power consumption with slight changes in the manufacturing process. Through the relationship with the Athlon 64, the memory controller in the CPU is also in Turion 64 The integrated, and the communication via the North Bridge omitted.

Advantages:

• fast communication with the storage system by eliminating bottlenecks
• overall lower power consumption than with an external northbridge

Disadvantage:

• The type of memory used is directly dependent on the CPU. For example, the Turion 64 with a Lancaster core can only address DDR memory, whereas the Turion 64 with a Richmond core is able to address DDR2 memory.
• As a power-saving measure, HyperTransport communication is switched off in C3 power-saving mode. When using shared memory graphics cards, however , the GPU constantly accesses the main memory. This would then no longer be available. So that the graphics card can read out the image several times per second and the power-saving functions can still be used, the chipset must support the so-called stutter mode in order to enable the hardware to access the main memory without a CPU.

Designation scheme

The designation scheme used is primarily based on maximum power consumption and computing power: The abbreviation MT denotes the low-voltage version with a maximum of 25  watts of power loss ( TDP ), ML the standard version with a maximum of 35 W. This is followed by a two-digit number for comparability to ensure the performance of the model variants. The Turion 64 is - like other AMD64 CPUs before - available with different L2 cache sizes. The L2 cache sizes vary between 512 and 1024 KiB, with the higher-end models having a larger L2 cache .

On September 1, 2006, a new model with the code name " Richmond " was launched, which uses the S1 socket . It therefore has a DDR2 memory interface and can now use the AMD-V virtualization technology .

marketing

AMD positions the marketing concept, officially called Turion 64 Mobile Technology , against that of the Centrino from Intel . In contrast to Intel, however, AMD does not tie the use of the brand name to the use of certain, primarily in-house chipsets , but leaves the choice of components to the manufacturer. ATI Technologies , VIA Technologies and SiS offer notebook chipsets for the Turion 64 :

• ATI Xpress
• VIA K8M series
• VIA K8T series

Model data socket 754

All processors for socket 754 have a memory controller with one channel (64 bit, single-channel operation) for DDR-SDRAM .

Lancaster

Model MT-34 (top)

Model MT-34 (bottom)

• Revision E5
• L1 cache: 64 + 64  KiB (data + instructions)
• L2 cache: 512 KiB or 1024 KiB with processor clock
• MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , AMD64 , PowerNow! , NX bit
• Socket 754 , HyperTransport with 800 MHz (HT1600)
• Operating voltage (VCore):
  • 0.9-1.35 V ( ML series)
  • 0.9–1.2 V ( MT series)
• Release DATE: March 10, 2005
• Manufacturing technology: 90 nm ( SOI )
• Clock rates: 1.6–2.4 GHz
  • ML models (Turion Desktop Replacement):
    • ML-28: 1.6 GHz (512 KiB L2 cache, 32 W TDP ) [22. June 2005]
    • ML-30: 1.6 GHz (1024 KiB L2 cache, 32 W TDP) [10. March 2005]
    • ML-32: 1.8 GHz (512 KiB L2 cache, 34 W TDP) [10. March 2005]
    • ML-34: 1.8 GHz (1024 KiB L2 cache, 34 W TDP) [10. March 2005]
    • ML-37: 2.0 GHz (1024 KiB L2 cache, 35 W TDP) [10. March 2005]
    • ML-40: 2.2 GHz (1024 KiB L2 cache, 35 W TDP) [22. June 2005]
    • ML-42: 2.4 GHz (512 KiB L2 cache, 35 W TDP) [1. October 2005]
    • ML-44: 2.4 GHz (1024 KiB L2 cache, 35 W TDP) [4. January 2006]
  • MT models (Turion Low Power):
    • MT-28: 1.6 GHz (512 KiB L2 cache, 22 W TDP) [22. June 2005]
    • MT-30: 1.6 GHz (1024 KiB L2 cache, 22 W TDP) [10. March 2005]
    • MT-32: 1.8 GHz (512 KiB L2 cache, 24 W TDP) [10. March 2005]
    • MT-34: 1.8 GHz (1024 KiB L2 cache, 24 W TDP) [10. March 2005]
    • MT-37: 2.0 GHz (1024 KiB L2 cache, 25 W TDP) [22. August 2005]
    • MT-40: 2.2 GHz (1024 KiB L2 cache, 25 W TDP) [22. August 2005]

Model data base S1

All processors for socket S1 have a memory controller with two channels (128 bit, dual-channel operation) for DDR2-SDRAM .

Richmond

• Revision F2
• L1 cache: 64 + 64 KiB (data + instructions)
• L2 cache: 512 KiB with processor clock
• MMX , Extended 3DNow! , SSE , SSE2 , SSE3 , AMD64 , PowerNow! , NX-Bit , AMD-V
• Socket S1 , HyperTransport (800 MHz, HT1600)
• Operating voltage (VCore): 1.00–1.45 V
• Release DATE: September 1, 2006
• Manufacturing technology: 90 nm ( SOI )
• Clock rates: 2.0–2.2 GHz
  • MK models:
    • MK-36: 2.0 GHz (512 KiB L2 cache, 31 W TDP ) [1. September 2006]
    • MK-38: 2.2 GHz (512 KiB L2 cache, 31 W TDP) [1. September 2006]

Web links

• AMD Turion 64 product page at AMD
• Explanation of the model numbers